SPRACP7 October   2019 AM6526 , AM6528 , AM6546 , AM6548

 

  1.   AM65xx Time Synchronization Architecture
    1.     Trademarks
    2. 1 Introduction
    3. 2 AM65xx Time Sync Architecture
      1. 2.1 Functional Overview
      2. 2.2 Time Sync Components
        1. 2.2.1 TSR and CER
        2. 2.2.2 NAV_CPTS
        3. 2.2.3 DM_Timers and Timer Managers
        4. 2.2.4 PCIe With PTM
        5. 2.2.5 IEP Timers in ICSSGx
        6. 2.2.6 CPSW
        7. 2.2.7 GTC
    4. 3 Time-Synchronization Examples
      1. 3.1 AM65xx as the Time Master Server
      2. 3.2 Multi-Domain Time Synchronization Across PCIe Interconnect
      3. 3.3 Hand-Over and Recovery
    5. 4 Summary
    6. 5 References

1 Introduction

In control and automation systems, applications and communications are often required to be synchronized across the network or across devices within the subsystem. Each level of synchronization has its own precision requirements. For example, a cloud-based factory may require its "Wall Clock" to be synchronized via GPS, across its global locations; or a control network may require all devices in the network to be synchronized to a "Working Clock", for time-triggered frame transmissions; or, a subsystem with multiple devices and clock sources will be synchronized to a common time-base, sometimes referred to as "System Time".

Table 1 shows commonly used time synchronization protocols defined on different network interfaces. These protocols govern inter-operatibility of network components when they are implemented. However, when a device supporting multiple types of interfaces is used, the system may require the device to synchronize time-base across these interfaces, hardware architecture support may be needed to facilitate software implementation.

Table 1. Commonly Used Time-Synchronization Protocols

Description Released Best Achievable Accuracy Applications TI Devices
GPS GPS Satellites --- 100 µs-1 ms Wire- and wireless networks ---
IETF NTP Network Time Protocol 1985 Tens of Milliseconds<1ms LAN Internet Software
IEEE 1588 2002 Precision Time Protocol 2002 <1 µs LAN K2H, K2L, AM3x/4x/5x, AM65x
IEEE 1588v2 Precision Time Protocol V2 2008 <1 ns LAN K2H, K2L, AM3x/4x/5x, AM65x
IEEE 802.1AS Timing and Synchronization for Time-Sensitive Applications in Bridged Local Area Networks 2011 <1 ns LAN K2H, K2L, AM3x/4x/5x, AM65x
PCIE PTM Precision Time Measurement 2013 1 ns Real-time system clock synchronization AM65x
SyncE Synchronous Ethernet ~2010 0.01 PPM Wireless etc K2H, K2L
SyncR (TI internal naming) Synchronous Radio I/F (CPRI) --- --- Wireless K2L

Figure 1 shows a simplified control module, where three controller devices are deployed. Device A is the host where Devices B and C are connected to it via PCIe ports. Device B and C are network interface cards that is connected to A. Additionally, Device B connects to a GPS receiver that sends out a pulse train for the Global Time (Wall Clock). Device C receives a Working Clock via the IEEE 802.1AS protocol. In later sections of this document, it is described how these three types of time-bases are maintained for the network, based on AM65xx time sync architecture.

spracp7-fig1-timebase-example.gifFigure 1. Example of a Control Module With Multiple Time Bases