The AM64x and AM243x processors support two different types of DDR memories: DDR4 and LPDDR4. This allows customer board designs to be implemented with the memory type that best meets their target market at the lowest possible DDR SDRAM cost. This document is divided into three sections. The first section contains material applicable to board designs containing either of the DDR SDRAM memory types. This is followed by sections containing information specific to each of the DDR memory types.

The goal of this document is to make the DDR system implementation straightforward for all designers. Requirements have been distilled down to a set of layout and routing rules that allow designers to successfully implement a robust design for the topologies that TI supports. At this time, TI does not provide timing parameters for the processor’s DDR PHY interface.

It is still expected that the PCB design work (design, layout, and fabrication) be performed and reviewed by a highly knowledgeable high-speed PCB designer. Problems such as impedance discontinuities when signals cross a split in a reference plane can be detected visually by those with the proper experience.

TI only supports board designs using DDR4 and LPDDR4 memory that follow the guidelines in this document. These guidelines are based on well-known transmission line properties for copper traces routed over a solid reference plane. Declaring insufficient PCB space does not allow routing guidelines to be discounted.