SPRACU5C June 2021 – September 2023 AM2431 , AM2432 , AM2434 , AM6411 , AM6412 , AM6421 , AM6422 , AM6441 , AM6442
SERDES0 PHY Differential Transmit Data (TX0) and Differential Receive Data (RX0) signals are configured for PCIe functionality. SERDES0_TX0_P and SERDES0_TX0_N signals are configured as PCIE0_TX0_P and PCIE0_TX0_N. SERDES0_RX0_P and SERDES0_RX0_N signals are configured as PCIE0_RX0_P and PCIE0_RX0_N.