SPRACV1B February   2022  – January 2024 AM2434 , AM6411 , AM6412 , AM6421 , AM6441 , AM6442

 

  1.   Abstract
  2.   2
  3.   Trademarks
  4. 1Introduction
  5. 2Processor Core Benchmarks
    1. 2.1 Dhrystone
    2. 2.2 Trigonometric Functions
  6. 3Compute and Memory System Benchmarks
    1. 3.1 Memory Bandwidth and Latency
      1. 3.1.1 LMBench
      2. 3.1.2 STREAM
      3. 3.1.3 Cortex-R5 Memory Access Latency
    2. 3.2 CoreMark®-Pro
    3. 3.3 Fast Fourier Transform
    4. 3.4 Cryptographic Benchmarks
  7. 4Application Benchmarks
    1. 4.1 Machine Learning Inference
    2. 4.2 Field Oriented Control (FOC) Loop
    3. 4.3 PCIE to DDR Performance Using BCDMA
      1. 4.3.1 Test Setup
      2. 4.3.2 Result and Observation
    4. 4.4 DDR to DDR Performance Using BCDMA
      1. 4.4.1 Test Setup
      2. 4.4.2 Result and Observation
  8. 5References
  9. 6Revision History

2.1 Dhrystone

Dhrystone is a core only benchmark that runs from warm L1 caches in all modern processors. It scales linearly with clock speed. The score calculated by normalizing the time it takes the benchmark loop to run by the reference 1MIP machine score of 1757. Even though the benchmark was introduced in 1984 by Reinhold P. Weicker, Dhrystone still gets used in embedded processing. It is common to further normalize to DMIPS/MHz/core as the score scales linearly with clock speed. For standard Arm cores, the DMIPS/MHz will be identical with the same compiler and flags. Dhrystone is a single core benchmark, a simple sum of multiple cores running the benchmark in parallel is sometimes used. The aggregate score for AM6442 with two A53 cores at 1GHz (6000DMIPS) and four R5F cores at 800MHz (6400DMIPS) is 12400DMIPS.

Cortex-A53 (1 GHz) Cortex-R5F (800 MHz)
Dhrystones 5263158 2,962,962
Normalized Dhrystones (divide by 1757 reference for 1MIP) 2996 1686
DMIPS/MHz each core 3 2.1
Compiler and flags GCC 9.2 -march=ARMv8 -O3 Arm Compiler 6.14 -mcpu=cortex-r5 -O3
Operating System Linux 5.10 (2021 LTS) Bare metal