SPRACV2 November 2020 AWR1843 , AWR2243
Table 7-1 briefly explains some terms used in this note.
Device | TI’s radar system on chip, such as AWR1243or AWR2243 |
Single chip | A usage scenario where a radar sensor includes only one AWR device and performs coherent processing of data only within frames and not across frames. |
Cascade | A radar system operating multiple AWR devices together to improve sensing |
Advanced single chip | A usage scenario where a single chip radar sensor performs coherent processing across multiple frames, thereby needing phase stability across frames. |
Host | The processor or microcontroller that controls the cascade’s multiple AWR devices |
DSP | The (internal or external) processor which processes the AWR devices’ RX ADC data |
Analog | Mm-wave, RF, analog circuits and subsystems in the device |
Analog configurations | Bias currents, voltages, capacitor, resistor values that control the analog operation |
Offsets | A collective term for errors, such as inter-channel imbalances, TX phase shifter nonlinearity errors. |
Customer | The customer of the AWR devices who manufactures the radar sensor PCB using them. |
Non-volatile memory (NVM) | A memory element in the sensor which can be populated during the factory calibration process (e.g. with calibration results) and which can be read in field. |
Factory calibration temperature | Temperature at which Customer factory is performed (typically 25C). |
Cold, Mid, Hot settings | A nomenclature to illustrate the AWR analog settings corresponding to broad temperature ranges. |
DoE, DoE devices | Design of Experiments, and associated devices. This refers to intentional skewing of device manufacturing process parameters to manufacture a few devices for TI lab evaluation, in order to capture/understand the effect process variation in mass manufacture of devices. |
INL error | Integrated Non Linearity error, referring to TX phase shifter’s deviation from ideal 0 to 360o characteristics. |