SPRACV2 November   2020 AWR1843 , AWR2243

 

  1.   Trademarks
  2. 1Introduction
    1. 1.1 Background – Simple Single-Chip Applications
  3. 2Cascade Incoherence Sources and Mitigation Strategies
    1. 2.1 PCB Routing Imbalances and Device Processes
    2. 2.2 Temperature Drifts
    3. 2.3 Scheduling of Run Time Calibrations
  4. 3Enabling Cascade Coherence and Improved Phase Performance
    1. 3.1 High-Level Summary
      1. 3.1.1 Sequence of Proposed Steps and Introductory Flow Diagrams
    2. 3.2 Saving RF INIT Calibration Results at Customer Factory
      1. 3.2.1 Note on LODIST Calibration
      2. 3.2.2 TX Phase Shifter Calibration and Saving Results at Customer Factory
    3. 3.3 Corner Reflector-Based Offsets Measurement at Customer Factory
      1. 3.3.1 Corner Reflector-Based Inter-Channel Imbalances
      2. 3.3.2 Corner Reflector-Based TX Phase Shifter Errors
    4. 3.4 Restoring Customer Calibration Results In-Field
      1. 3.4.1 Restore RF INIT Calibrations Results In-Field
      2. 3.4.2 Restore TX Phase Shift Calibration Results In-Field
    5. 3.5 Host-Based Temperature Calibrations In-Field
      1. 3.5.1 Disabling AWR Devices’ Autonomous Run Time Calibrations
      2. 3.5.2 Enabling Host-Based Temperature Calibrations of Inter-Channel Imbalances
      3. 3.5.3 Switching of DSP Imbalance Data
      4. 3.5.4 Enabling TX Phase Shifter’s Host-Based Temperature Calibrations
        1. 3.5.4.1 Estimating TX Phase Shift Values at Any Temperature
        2. 3.5.4.2 Temperature Correction LUTs for AWR1843TX Phase Shifter
        3. 3.5.4.3 Temperature Correction LUTs for AWR2243 TX Phase Shifter
        4. 3.5.4.4 Restoring TX Phase Shift Values – Format Conversion
        5. 3.5.4.5 Restoring TX Phase Shift Values – Transition Timing and Constraints
        6. 3.5.4.6 Typical Post-Calibration TX Phase Shifter Accuracies
        7. 3.5.4.7 Correcting for Temperature Drift While Sweeping Across Phase Settings
        8. 3.5.4.8 Amplitude Stability Across Phase Shifter Settings
        9. 3.5.4.9 Impact of Customer PCB’s 20-GHz Sync Path Attenuation on TX Phase Shifters
      5. 3.5.5 Ambient and Device Temperatures
  5. 4Concept Illustrations
  6. 5Miscellaneous (Interference, Gain Variation, Sampling Jitter)
    1. 5.1 Handling Interference In-Field
    2. 5.2 Information on TX Power and RX Gain Drift with Temperature
    3. 5.3 Jitter Between Chirp Start and ADC Sampling Start
  7. 6Conclusion
  8.   A Appendix
    1.     A.1 Terminology
    2.     A.2 References
    3.     A.3 Flow Diagrams for Proposed Cascade Coherence Scheme
    4.     A.4 LUTs for TX Phase Shifter Temperature Drift Mitigation
    5.     A.5 Circular Shift of TX Phase Shifter Calibration Data Save and Restore APIs

Corner Reflector-Based Inter-Channel Imbalances

The imbalance measurements should be done with the AWR device in multiple calibration settings, optimized for various operating temperatures. To mitigate in-field temperature drifts, the analog settings must be reconfigured based on operating temperature. TI recommends that offset measurements at factory be done at three configurations (temperature index/indices):

  • Low Bias setting – i.e., RF settings optimized for low temperatures, such as –40°C to 10°C
  • Mid Bias setting – i.e., RF settings optimized for mid temperatures, such as 0°C to 50°C (approximately the factory calibration temperature)
  • High Bias setting – i.e., RF settings optimized for high temperatures, such as 40°C to 140°C

The ambient temperature is still kept the same while only varying the devices’ analog configurations according to other temperature settings. The customer may fix the temperature ranges corresponding to Low Bias, Mid Bias, and High Bias settings based on the sensor’s expected in-field temperature range, allowing a small overlap for transitions.

The measurements procedure is as follows.

  1. Issue profile, chirp, and frame configuration APIs to set the desired chirp sequences, including RX gain, TX power, RF frequency, and so forth.
  2. Perform these measurements at 0° TX phase shift to avoid TX phase shift nonlinearity effects.
  3. Set the TX gain codes, RX gain codes (and LO DIST codes for the AWR2243) with temp index corresponding to the Low Bias, Mid Bias, and High Bias settings, iteratively. An example with recommended temp indices is illustrated in Table 3-1. The recommended steps for setting the codes with desired temp indices are described below for TI's mmWave MMICs.
    • For AWR1243, AWR1843, AWR1642:
      1. Use the AWR RX GAIN TEMPLUT GET SB API and AWR TX GAIN TEMPLUT GET SB API to know the results of each device’s self-calibration algorithms for this gain, power, and RF. The output is an LUT, which is a function of temperature (in 10°C resolution).
      2. Based on the results of the above APIs, choose the RX and TX gain codes for the Low Bias, Mid Bias, or High Bias setting.
      3. Use the AWR RX GAIN TEMPLUT SET SB API and AWR TX GAIN TEMPLUT SET SB API to set the desired analog setting to each AWR device in the cascade (each device to have its individual values).
    • For AWR2243:
      1. Use AWR RUN TIME CALIBRATION CONF AND TRIGGER SB with temperature index override enabled for TX, RX, and LODIST along with respective temperature indices corresponding to Low Bias, Mid Bias, or High Bias setting.
  4. Use a corner reflector at 0° direction to estimate the inter-channel imbalances across all TXm-RXn combinations. Measure this for each bias setting (Low Bias, Mid Bias, High Bias). An example structure of the imbalance data for a two-chip cascade is shown in Table 3-2.
  5. Store the imbalance data for each index (Low Bias, Mid Bias, High Bias) in the sensor’s non-volatile memory for in-field usage.
Table 3-1 Example (Device) Temperature Ranges and TX/RX Gain Codes
Setting Temp. Range (e.g.) Recommended Temp Index for TX Gain Codes Recommended Temp Index for RX Gain Codes Recommended Temp Index for LO DIST Codes (Applicable for AWR2243 only)
Low Bias –40°C* to 10°C 10°C

–40°C

(lowest of temp range to ensure P1dB)

10°C
Mid Bias 0°C to 50°C 50°C

25°C

(mid temp range)

50°C
High Bias 40°C to 140°C* 140°C

140°C

(highest of temp range to ensure noise figure)

140°C
Guidance * Limit to sensor’s in-field expected operating range Highest of each temp range to ensure output power
  1. With this, RX gain drifts with temperature within each temperature range but without adversely impacting noise figure and P1dB.
  2. The above is an example assuming that the device temperature is 25°C during the factory measurements. Suitable adjustments may be considered if the device temperature is significantly higher and also if the application needs a different temperature range of operation.
  3. The device temperature can be known from the RF INIT calibration status report (AWR_AE_RF_INITCALIBSTATUS_SB) or through device’s temperature monitoring API.
  4. The transition temperatures between the settings should not be too away from the factory calibration temperature. This ensures more accurate calibration at low and high bias conditions.
Table 3-2 Example Structure of Inter-Channel Imbalance Data in a 2-Chip Cascade
Device 1 Device 2
RX1 RX2 RX3 RX4 RX1 RX2 RX3 RX4
Low Bias Device 1 TX1 0 A12 A13 A14 A15 A16 A17 A18
TX2 A21 A22 A23 A24 A25 A26 A27 A28
TX3 A31 A32 A33 A34 A35 A36 A37 A38
Device 2 TX1 A41 A42 A43 A44 A45 A46 A47 A48
TX2 A51 A52 A53 A54 A55 A56 A57 A58
TX3 A61 A62 A63 A64 A65 A66 A67 A68
Mid Bias Device 1 TX1 0 B12 B13 B14 B15 B16 B17 B18
TX2 B21 B22 B23 B24 B25 B26 B27 B28
TX3 B31 B32 B33 B34 B35 B36 B37 B38
Device 2 TX1 B41 B42 B43 B44 B45 B46 B47 B48
TX2 B51 B52 B53 B54 B55 B56 B57 B58
TX3 B61 B62 B63 B64 B65 B66 B67 B68
High Bias Device 1 TX1 0 C12 C13 C14 C15 C16 C17 C18
TX2 C21 C22 C23 C24 C25 C26 C27 C28
TX3 C31 C32 C33 C34 C35 C36 C37 C38
Device 2 TX1 C41 C42 C43 C44 C45 C46 C47 C48
TX2 C51 C52 C53 C54 C55 C56 C57 C58
TX3 C61 C62 C63 C64 C65 C66 C67 C68