SPRACV2 November   2020 AWR1843 , AWR2243

 

  1.   Trademarks
  2. 1Introduction
    1. 1.1 Background – Simple Single-Chip Applications
  3. 2Cascade Incoherence Sources and Mitigation Strategies
    1. 2.1 PCB Routing Imbalances and Device Processes
    2. 2.2 Temperature Drifts
    3. 2.3 Scheduling of Run Time Calibrations
  4. 3Enabling Cascade Coherence and Improved Phase Performance
    1. 3.1 High-Level Summary
      1. 3.1.1 Sequence of Proposed Steps and Introductory Flow Diagrams
    2. 3.2 Saving RF INIT Calibration Results at Customer Factory
      1. 3.2.1 Note on LODIST Calibration
      2. 3.2.2 TX Phase Shifter Calibration and Saving Results at Customer Factory
    3. 3.3 Corner Reflector-Based Offsets Measurement at Customer Factory
      1. 3.3.1 Corner Reflector-Based Inter-Channel Imbalances
      2. 3.3.2 Corner Reflector-Based TX Phase Shifter Errors
    4. 3.4 Restoring Customer Calibration Results In-Field
      1. 3.4.1 Restore RF INIT Calibrations Results In-Field
      2. 3.4.2 Restore TX Phase Shift Calibration Results In-Field
    5. 3.5 Host-Based Temperature Calibrations In-Field
      1. 3.5.1 Disabling AWR Devices’ Autonomous Run Time Calibrations
      2. 3.5.2 Enabling Host-Based Temperature Calibrations of Inter-Channel Imbalances
      3. 3.5.3 Switching of DSP Imbalance Data
      4. 3.5.4 Enabling TX Phase Shifter’s Host-Based Temperature Calibrations
        1. 3.5.4.1 Estimating TX Phase Shift Values at Any Temperature
        2. 3.5.4.2 Temperature Correction LUTs for AWR1843TX Phase Shifter
        3. 3.5.4.3 Temperature Correction LUTs for AWR2243 TX Phase Shifter
        4. 3.5.4.4 Restoring TX Phase Shift Values – Format Conversion
        5. 3.5.4.5 Restoring TX Phase Shift Values – Transition Timing and Constraints
        6. 3.5.4.6 Typical Post-Calibration TX Phase Shifter Accuracies
        7. 3.5.4.7 Correcting for Temperature Drift While Sweeping Across Phase Settings
        8. 3.5.4.8 Amplitude Stability Across Phase Shifter Settings
        9. 3.5.4.9 Impact of Customer PCB’s 20-GHz Sync Path Attenuation on TX Phase Shifters
      5. 3.5.5 Ambient and Device Temperatures
  5. 4Concept Illustrations
  6. 5Miscellaneous (Interference, Gain Variation, Sampling Jitter)
    1. 5.1 Handling Interference In-Field
    2. 5.2 Information on TX Power and RX Gain Drift with Temperature
    3. 5.3 Jitter Between Chirp Start and ADC Sampling Start
  7. 6Conclusion
  8.   A Appendix
    1.     A.1 Terminology
    2.     A.2 References
    3.     A.3 Flow Diagrams for Proposed Cascade Coherence Scheme
    4.     A.4 LUTs for TX Phase Shifter Temperature Drift Mitigation
    5.     A.5 Circular Shift of TX Phase Shifter Calibration Data Save and Restore APIs

3.5.4.7 Correcting for Temperature Drift While Sweeping Across Phase Settings

This section describes a minor aspect regarding temperature drift during factory calibrations and formation of Factory Measured Phase Shift ArrayCornerReflector,TXm (0 to 63). Even if ambient temperature is stable, if there is slight drift in the device temperature while sweeping the phase shifter setting from 0 to 63 due to self-heating, it can cause a drift in PS INL measurement for the device as the experiment progresses. If there is a significant amount of drift across phase settings, then the customer can consider repeating the 0 phase shifter setting measurement at the end during the customer factory measurements, i.e. measure the phase shifter INL for the settings 0, 1, 2, 3, …., 62, 63, 0. After deriving the phase shifter INL from the measurements, the host processor can apply a linearly increasing correction as described by the following formula, so that the phase shifter INL for 0 phase setting measurement at the end becomes 0.

Equation 9. Factory Measured Phase Shift Array (0 to 64) = Factory Measured Phase Shift Array (0 to 64) - Factory Measured Phase Shift Array (0).
Equation 10. Factory Measured Phase Shift Array (0 to 63) = Factory Measured Phase Shift Array (0 to 63) + ((360° – Factory Measured Phase Shift Array (64))*[0:63]/64.

Here, Factory Measured Phase Array (64) refers to the measured phase shift value when 0 phase setting is repeated at the end.

This can compensate for the impact of temperature drift while sweeping the phase shifter settings. Figure 3-6 illustrates the compensation of temperature drift impact on PS INL measurements by applying a linear correction across phase settings.

GUID-0B284757-4895-4D6E-A634-B4EB0B39925F-low.png Figure 3-6 Raw measured PS INL during the calibration procedure, and illustration of linear compensation for phase changes temperature drift during calibration measurements