SPRAD00 December 2021 DRA821U-Q1 , DRA829J , DRA829J-Q1 , DRA829V , DRA829V-Q1 , TDA4VM
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Jacinto 7 TDA4VM and DRA829V processors [1, 2] Display Sub-System (DSS) provides the logic to output video frames stored in the memory to the external display interfaces. The DSS performs multi-layer composition for the display output and supports a set of industry standard display interfaces to drive wide range of display panel resolutions. For the complete DSS feature-set, see the DRA829/TDA4VM Technical Reference Manual [3].
The DSS is a flexible composition-enabled display subsystem, that supports multiple high resolution display outputs. The DSS supports a multi-layer blending and transparency for each of its display outputs. The DSS block diagram is shown in Figure 2-1.
The DSS is divided into blocks that are connected internally and high-level features that are summarized in the next sections.