SPRAD00 December   2021 DRA821U-Q1 , DRA829J , DRA829J-Q1 , DRA829V , DRA829V-Q1 , TDA4VM

 

  1.   Trademarks
  2. 1Introduction
  3. 2Jacinto 7 Display Subsystem Overview
    1. 2.1 Video (Input) Pipelines
    2. 2.2 Writeback Pipeline
    3. 2.3 Overlay Manager
    4. 2.4 Output Processing
    5. 2.5 Output Display Interfaces
      1. 2.5.1 Embedded Display Port (eDP)
      2. 2.5.2 MIPI Display Serial Interface (DSI)
      3. 2.5.3 Display Parallel Interface (DPI)
    6. 2.6 Safety Support
  4. 3Display Subsystem Use-case Examples
    1. 3.1 3-Display Configuration
  5. 4TDA4VM/DRA829V Hardware Display Support
  6. 5 Display Subsystem Software Architecture
    1. 5.1 Linux DSS Architecture
    2. 5.2 QNX Software Architecture
    3. 5.3 RTOS-Based DSS Support
  7. 6References

1 Introduction

Jacinto 7 TDA4VM and DRA829V processors [1, 2] Display Sub-System (DSS) provides the logic to output video frames stored in the memory to the external display interfaces. The DSS performs multi-layer composition for the display output and supports a set of industry standard display interfaces to drive wide range of display panel resolutions. For the complete DSS feature-set, see the DRA829/TDA4VM Technical Reference Manual [3].