With the help of scalable analog integration, the MSPM0Gx50x devices can accurately sense the motor phase currents and voltage, compute the real-time motor speed and error calculations, and output space-vector generated PWM signals to close the speed loop. Two programmable gain amplifiers (PGAs) amplify the difference between phase currents sensed through two shunt resistors and a scaled DAC output voltage, and the output of the PGAs directly can be sampled by internal ADCs. Additionally, the MSPM0G350x family of devices provide a hardware math accelerator (MATHACL) that increases the computational throughput of math functions required in FOC transformations, such as multiply, divide, arctangent, sine, and cosine.

This topology provides a low-cost alternative to using a discrete analog signal chain and is designed for BLDC, PMSM, and ACIM motors that require high voltages and high efficiency. Some examples of applications include servo drives, HVAC motors, and large appliances.

As shown in Figure 6-4, the signals used this system topology are:

• 6 PWM signals with adjustable deadband (6x PWM)
• Logic-low fault signal from driver (nFAULT)
• Two integrated Opamps with programmable gain in inverting- or non-inverting configuration
• ADC current sense from output of integrated Opamps and bus sense voltage
• 12-bit DAC reference for external current sense signal biasing
• Optional bus overcurrent protection using integrated low-side comparator

Figure 6-4 Block Diagram for Sensorless FOC for BLDC/PMSM/ACIM Motors using MSPM0Gx50x with Analog Integration and 3-Phase Gate Driver Powerstage