SPRAD85B September 2024 – December 2024 AM62A3 , AM62A3-Q1 , AM62A7 , AM62A7-Q1 , AM62D-Q1
Using an ANDing logic to reset the attached devices as applicable (on-board media and data storage devices, and other peripherals) is recommended. Processor general purpose input/output (GPIO) pin is connected to one of the AND gate input with provision for 0Ω to isolate the GPIO input for testing or debug. Processor IO buffers are off during reset. The recommendation is to place a pullup near to the AND gate input to prevent the AND gate input from floating and enabling the reset logic controlled by the processor IO during power-up. Main Domain POR (cold reset) status output (PORz_OUT) or Main Domain warm reset status output (RESETSTATz) signal can be connected as the other input to the AND gate. Make sure the processor IO supply and the pullup supply used near to the AND logic input are sourced from the same power source.
The choice of reset status output is application dependent. Make sure the attached device reset inputs are pulled as per the device recommendations.
In case an ANDing logic is not used and the processor main domain warm reset status output (RESETSTATz) is used to reset the attached device, match the IO voltage level of the attached device and RESETSTATz. A level translator is recommended to match the IO voltage level.
The recommendation is to provision for a software enabled (controlled) power switch (load switch) that sources the SD card power supply (VDD). A fixed 3.3V supply (IO supply connected to the processor) is connected as an input to the power switch.
Use of power switch allows power cycling of the SD card (since resetting the power switch is the only way to reset the SD card) and resetting the SD card to the default state.
For more information on implementing reset logic for the attached devices and power switch enable logic for SD card, refer the Starter Kit SK-AM62A-LP or AUDIO-AM62D-EVM schematics.