The Jacinto 7 family of devices support multiple internal memories to achieve the best in class system latency, bandwidth, and functional safety requirements for a large number of automotive and industrial applications. The device-specific Data Sheet along with the Technical Reference Manual (TRM) can provide a detailed overview of the different kinds of memories in the device and their intended usage.
This application note is specific to TDA4VM and gives a brief overview of the different memory types and a typical use case for which it may be used along with the Software Development Kit (SDK) careabouts.
TDA4VM | |
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Data sheet | https://www.ti.com/lit/gpn/tda4vm |
TRM | https://www.ti.com/lit/zip/spruil1 |
SDK | https://www.ti.com/tool/PROCESSOR-SDK-J721E |
For details more than what is covered in this application note, see the TDA4VM Jacinto™ Processors for ADAS and Autonomous Vehicles Sil Revs 1.0 and 1.1 Data Sheet and DRA829/TDA4VM Technical Reference Manual. If further clarifications are required, post on the TI's Processor's E2E forum.
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This document covers the below memories and subsystems on the TDA4VM:
This section provides details on the different types of memories on the device along with their typical use cases. This information is key in designing the memory requirements for the end system.
The PSROM module provides a memory mapped region that may be used for accessing ROM. The module has no registers, and maps the bus interface address, control, and read data signals to the address, control, and read data of the ROM. For more information, see the Memory Map of the Device chapter in DRA829/TDA4VM Technical Reference Manual.