SPRADC4 june   2023 AM62A3 , AM62A3-Q1 , AM62A7 , AM62A7-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2AM62A Processor
  6. 3Vision Pre-processing Accelerator (VPAC)
    1. 3.1 Vision Imaging Sub-System (VISS)
    2. 3.2 Lens Distortion Correction (LDC) Block
    3. 3.3 Multi-Scalar (MSC) Block
  7. 4Deep Learning Acceleration
  8. 5Camera Mirror System Data Flow and Latency
  9. 6End-to-End Functional Safety
  10. 7Example Demonstration
    1. 7.1 Hardware Equipment
    2. 7.2 Software Components
    3. 7.3 Latency Measurement
    4. 7.4 Future Improvement on Latency
  11. 8Summary
  12. 9References

3 Vision Pre-processing Accelerator (VPAC)

The VPAC subsystem on the AM62A device provides common vision primitive functions for image data processing which is performed at the pixel level. There are three sub-modules in VPAC: Vision Imaging Sub-System (VISS), Lens Distortion Correction (LDC) block, and the Multi-Scalar (MSC) block, as illustrated in Figure 3-1. The VPAC also includes an imaging pipe, which can either be integrated with external camera sensors to operate in on-the-fly mode, or operate in memory-to-memory mode. MSC and LDC can start processing immediately after their upstream block finishes processing.

GUID-20230607-SS0I-T182-BB1G-BMBBRXT95KRG-low.svgFigure 3-1 VPAC Block Diagram