SPRADC4 june   2023 AM62A3 , AM62A3-Q1 , AM62A7 , AM62A7-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2AM62A Processor
  6. 3Vision Pre-processing Accelerator (VPAC)
    1. 3.1 Vision Imaging Sub-System (VISS)
    2. 3.2 Lens Distortion Correction (LDC) Block
    3. 3.3 Multi-Scalar (MSC) Block
  7. 4Deep Learning Acceleration
  8. 5Camera Mirror System Data Flow and Latency
  9. 6End-to-End Functional Safety
  10. 7Example Demonstration
    1. 7.1 Hardware Equipment
    2. 7.2 Software Components
    3. 7.3 Latency Measurement
    4. 7.4 Future Improvement on Latency
  11. 8Summary
  12. 9References

2 AM62A Processor

Figure 2-1 shows the AM62A microprocessor. The processor is a heterogeneous processor designed for camera analytics applications. There are different hardware accelerators optimized for different tasks thus enabling an optimized power and cost footprint.

GUID-20230607-SS0I-PNGH-9CMP-2BLL5VLW9ZXJ-low.svgFigure 2-1 AM62A Simplified Block Diagram

The main processing, compute, and interface subsystems from a CMS context in the AM62A are as follows:

  • Quad Arm® Cortex®-A53 cores: These cores can run up to 1.4 GHz and provide up to 16.8k Dhrystone Million Instructions Per Second (DMIPS) of performance.
  • C7x Digital Signal Processor (DSP) and Matrix Multiplication Accelerator (MMA): TI’s deep-learning accelerator on the AM62A is capable of 2 Tera Operations Per Second (TOPS) when clocked at 1 GHz.
  • Vision Pre-processing Accelerator (VPAC3L): The latest generation in TI Image Signal Processor (ISP) technology for performing image operations, some examples of which are color conversions, chromatic aberration correction, pyramid scaling, and lens distortion correction. The total throughput of VPAC3L is up to 300MP/s.
  • Camera Serial Interface (CSI-2 Rx): Mobile Industry Processor Interface (MIPI®) CSI-2 v1.3 compliant CSI-2 RX interface supporting 1, 2, 3, or 4 data lane mode of up to 1.5Gbps per lane.
  • Display Subsystem and DPI interface: The display subsystem is capable of driving a single display with a typical configuration of 2MP at 60 fps. The pixel clock support is set at 165 MHz. DPI supports a 24-bit RGB parallel interface.