SPRADG0A April   2024  – August 2024 AM62P , AM62P-Q1

 

  1.   Abstract
  2.   2
  3.   Trademarks
  4. 1Introduction
    1. 1.1 Change Cortex-A53 Clock Frequency
  5. 2Processor Core and Compute Benchmarks
    1. 2.1 Dhrystone
    2. 2.2 CoreMark-Pro
    3. 2.3 Fast Fourier Transform
    4. 2.4 Cryptographic Benchmarks
    5. 2.5 IPC Mailbox Latency
  6. 3Memory System Benchmarks
    1. 3.1 Memory Bandwidth and Latency
      1. 3.1.1 LMBench
      2. 3.1.2 STREAM
    2. 3.2 Critical Memory Access Latency
    3. 3.3 UDMA: DDR to DDR Data Copy
  7. 4Graphics Processing Unit Benchmarks
    1. 4.1 Glmark2
    2. 4.2 GFXBench5
  8. 5Video Codec
  9. 6References
  10. 7Revision History

3.3 UDMA: DDR to DDR Data Copy

This section provides test results and observations for DDR to DDR block copy, using both the High Capacity (HC) & Normal Capacity (NC) UDMA channels, detailed in Table 3-5.

Table 3-5 UDMA Channel Classes
Description
Normal Capacity (NC)Provides baseline amount of descriptor and TR prefetch and Tx/Rx control and data buffering. An excellent choice for most peripheral transfers which are communicating with on-chip memories and DDR. With a buffer size of 192B, this FIFO depth allows for 3 read transactions, of 64B data bursts, per flight.
High Capacity (HC)Provides an elevated amount of descriptor and TR prefetch and custom Tx/Rx control and data buffering. An excellent choice for applications which require moderate per-channel bandwidth with significantly increased data throughput. With an increased buffer size of 512B, this FIFO depth allows for 8 read transactions, of 64B data bursts, per flight.

The following measurements are collected using bare-metal silicon verification tests on A53 executing out of DDR. Transfer descriptors and rings in DDR. Tests were done at 0.75V VDD_CORE, 1.25GHz A53 cores, 800MHz R5F cores, and 3200MT/s LPDDR4. Transfer sizes range from 1KiB to 512KiB.

Table 3-6 UDMA: DDR to DDR Block Copy
Buffer Size (KiB)HC Channel Bandwidth (MiB/s)NC Channel Bandwidth (MiB/s)HC Channel Latency (μs)NC Channel Latency (μs)
1121.9296.218.0110.15
2188.16157.5110.3812.40
4369.56237.3210.5716.46
8542.16312.7514.4124.98
16711.20381.9421.9740.91
32895.93426.9134.8873.20
64985.03452.3163.45138.18
1281049.36464.93119.12268.86
2561087.10472.64229.97528.94
5121105.71476.06452.201050.29

Table 3-6 shows the transfer capacity of both HC & NC channels, and demonstrates an up to 2.3-fold increase in bandwidth, obtained by the High Capacity channel over the Normal Capacity channel.