SPRADH9 June   2024 AM6442

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Abbreviations
  5. 2Introduction
    1. 2.1 Peripheral Component Interconnect Express
      1. 2.1.1 Components of PCIe Communication
        1. 2.1.1.1 Root Complex
        2. 2.1.1.2 Repeater
        3. 2.1.1.3 Endpoints
      2. 2.1.2 Signaling
        1. 2.1.2.1 PERST
        2. 2.1.2.2 WAKE and CLKREQ
        3. 2.1.2.3 REFCLK
      3. 2.1.3 PCIe Common Usage
      4. 2.1.4 PCIe Aggregate Throughput
    2. 2.2 PCIe Features on AM64x and AM243x
  6. 3X86 as RC and AM64x as EP
    1. 3.1 Hardware Environment
    2. 3.2 Software Environment
      1. 3.2.1 Building Application
      2. 3.2.2 Usage
  7. 4Test Setup
    1. 4.1 Common Setup for LINUX and WIN
    2. 4.2 Linux Driver (VFIO)
      1. 4.2.1 Prerequisites
      2. 4.2.2 Building
      3. 4.2.3 Deploying
    3. 4.3 Test Application Usage
    4. 4.4 Setup Steps for LINUX PC
      1. 4.4.1 UART Console Output
    5. 4.5 MSI Example
    6. 4.6 Setup Steps for WINDOWS PC
      1. 4.6.1 Prerequisites
      2. 4.6.2 Building
      3. 4.6.3 Deploying
  8. 5PCIe Test Specification
    1. 5.1  Identification and Configuration Functionalities
      1. 5.1.1 Test Case
    2. 5.2  Reference Clock Functionalities
    3. 5.3  Inbound ATU and BAR Functionalities
    4. 5.4  Outbound ATU Functionalities
    5. 5.5  MSI Functionality
    6. 5.6  Downstream Interrupt Functionality
    7. 5.7  Device Power Management State Functionality
    8. 5.8  Function Level Reset Mechanism
    9. 5.9  Legacy Interrupt Mechanism
    10. 5.10 MSI-X Capability
    11. 5.11 Hot Reset Mechanism
  9. 6Windows Example Driver Verification
  10. 7References

5.5 MSI Functionality

Test

Description:

Test to verify if MSI IRQs are sent correctly from the PCIe EP to the address configured by the RC.

Execution:

  1. Run PCIe EP application pcie_enumerate_ep.
  2. Run Linux-based RC test application ti-sample-vfio.
  3. Check status of both programs. As ti-sample-vfio waits for MSI IRQs sent by PCIe EP on specified address, it can terminate without any failure ensuring correct functionality of PCIe EP MSI mechanism.

Test

Description:

Test to verify if the maximum number of different MSI IRQs (multi-message capable) available in the PCIe EP is determined correctly in the PCIe RC and if a reduced number of desired MSI IRQs (multi-message enable) can be requested from the RC.

Execution:

  1. Run PCIe EP application pcie_enumerate_ep with the default number of MSI IRQs set as 16.
  2. On Linux-based RC hardware check PCIe EP MSI capability on offset 90. The MSI capability can be disabled with a count set to 1 out of 16 as shown in the following figure.
  3. Run Linux-based RC test application ti-sample-vfio. Pass the default number of configured MSI IRQs as the desired number of MSI IRQs being tested as the fifth parameter:
    sudo ./ti-sample-vfio 9 0 0 19 16
  4. Continue ti-sample-vfio with enter until the program halts at status output Initialize MSI test. Expect 16 distinct MSI IRQs.
  5. Open a second Linux terminal and check the PCIe EP MSI capability at offset 90. The MSI mechanism can be enabled with a count of 16 as shown in the following figure.
  6. Continue ti-sample-vfio. The program can continue normally, perform an extended MSI test with 16 MSI IRQs and end without any failure as shown in the following figure.
  7. Run Linux-based RC test application ti-sample-vfio. Configure the number of MSI IRQs to be tested with less than the default number, for example, 8:
    sudo ./ti-sample-vfio 9 0 0 19 8
  8. Continue ti-sample-vfio with enter until the program halts at status output
    1. Initialize MSI test. Expect 8 distinct MSI IRQs.
  9. Check the PCIe EP MSI capability at offset 90 on second Linux terminal. The MSI capability can be enabled with the count 8 out of 16 as shown in the following figure.
  10. Continue ti-sample-vfio. The program can continue normally, perform an extended MSI test with 8 MSI IRQs and end without any failure as shown in the following figure.
  11. On Linux-based RC hardware check PCIe EP MSI capability on offset 90. The MSI capability can be disabled with a count set to 1 out of 16 as shown in the following figure.
    AM6442

Test

Description:

Test to verify is MSI per vector masking is disabled correctly at TMDS243EVM/TMDS64EVM PCIe EP.

Execution:

  1. On Linux-based RC hardware, check PCIe EP MIS capability with Linux terminal. The maskable filed can be disabled as shown in the following figure.
    AM6442