SPRADJ1A June 2024 – August 2024 TMS320F280021 , TMS320F280023 , TMS320F280023C , TMS320F280025 , TMS320F280025C , TMS320F280033 , TMS320F280034 , TMS320F280037 , TMS320F280037C , TMS320F280039 , TMS320F280039C , TMS320F280041 , TMS320F280041C , TMS320F280045 , TMS320F280049 , TMS320F280049C , TMS320F28075 , TMS320F28076 , TMS320F28374D , TMS320F28374S , TMS320F28375D , TMS320F28375S , TMS320F28376D , TMS320F28376S , TMS320F28377D , TMS320F28377S , TMS320F28378D , TMS320F28378S , TMS320F28379D , TMS320F28379S , TMS320F28P550SJ , TMS320F28P650DH , TMS320F28P650DK , TMS320F28P650SH , TMS320F28P650SK
The action qualifier (AQ) submodule of EPWM is configured as a RS latch, which controls the actions for the high side FET only. In this example, as shown in Figure 2-2, within the AQ module, EPWM1A is configured to set high at CTR= 0 event, and clear low at the comparator event, when the VCR signal and CMPSS ramp value intersect. To link the comparator event to EPWM, latest Type 4 EPWM provides the option to select the comparator event as the source for T1 event of AQ module. Note that the traditional trip action for peak current mode control with Trip Zone(TZ) module cannot apply for this case, since the TZ submodule is the final stage for the EPWM, so it cannot add the deadtime between EPWM1A and EPWM1B with the dead band (DB) module, while the AQ module is right before the DB module. More details regarding new T1/T2 features can refer to the technical reference manual.
For EPWM1B,the requirement is to generate the same pulse width as EPWM1A to achieve symmetry control. With the present EPWM features, it is difficult to make sure the same pulse width for EPWM1B automatically. Thus, CLB module is used in this design to generate the AQ output signal for EPWM1B.