SPRADJ9 August   2024 AM62P

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2AM62Px Processor
    1. 2.1 Key Features and Benefits
    2. 2.2 AM62P Display Subsystem
    3. 2.3 AM62P Display Subsystem Clocking Architecture
  6. 3Display Signals and Timing Parameters
  7. 4Steps for Integration (Linux®)
    1. 4.1 Linux® Overlay File
    2. 4.2 Timing Information
  8. 5Steps for Integration (RTOS)
  9. 6Terminology

Timing Information

The code snippet in this section is supported from the following reference:

static const struct drm_display_mode microtips_mf_101hiebcaf0_mode = {
	.clock = 150275,
	.hdisplay = 1920,
	.hsync_start = 1920 + 32,
	.hsync_end = 1920 + 32 + 52,
	.htotal = 1920 + 32 + 52 + 24,
	.vdisplay = 1200,
	.vsync_start = 1200 + 24,
	.vsync_end = 1200 + 24 + 8,
	.vtotal = 1200 + 24 + 8 + 3,
};

static const struct panel_desc microtips_mf_101hiebcaf0 = {
	.modes = &microtips_mf_101hiebcaf0_mode,
	.bpc = 8,
	.num_modes = 1,
	.size = {
		.width = 217,
		.height = 136,
	},
	.delay = {
		.prepare = 50,
		.disable = 50,
	},
	.bus_flags = DRM_BUS_FLAG_DE_HIGH,
	.bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_SPWG,
	.connector_type = DRM_MODE_CONNECTOR_LVDS,
};