General
Review and verify the following for the custom
schematic design:
- The sections
above, including relevant application notes and FAQ
links.
- Pin attributes,
signal description, and electrical specifications.
- Electrical
characteristics, timing parameters and any additional
available information.
- Selection of
processor clock input source, either crystal or
oscillator.
- 25MHz is the
clock input frequency currently supported. Refer
processor-specific data sheet for supported clock input
frequency.
- Selection of
crystal load capacitor versus data sheet
recommendations.
- PCB capacitance
for MCU_OSC0 is included in the calculation of crystal load
capacitance value.
- When oscillator
is used, add a decoupling capacitor and bulk capacitor near
to the oscillator supply pin.
Schematic Review
Follow the steps below for the custom schematic
design:
- Connection of
25MHz MCU_OSC0 clock is mandatory.
- Connections of
the crystal circuit (MCU_OSC0), as per the data sheet
recommendations.
- Direct connection
of crystal without series or parallel resistor.
- Selection of
crystal load and load capacitance including approximately
4pF board capacitance.
- A load capacitor
is recommended to be twice the crystal load, including board
capacitance.
- Connection of XO
when external oscillator is used, ground the XO.
Additional
- Refer to the Applications, Implementation, and Layout section of the data
sheet for clock routing guidelines
- Select crystal and load capacitor such that the load capacitor value can be a
standard value
- Connect the 25MHz crystal directly to the processor XI and XO pins, no series or
parallel resistors are recommended. The internal oscillator implements Automatic
Gain Control (AGC) for amplitude control
- The processor is validated with a 25MHz clock source, 25MHz is the only
frequency currently supported
- The data sheet shows that MCU_OSC0 does not start
until the core voltage ramps because there are some cases
where the oscillator does not start until VDD_CORE ramps. In
most cases, the oscillator starts when VDDS_OSC0 ramps,
although the oscillator starts when VDDS_OSC0 ramps is not
always the case. The oscillator start-up diagram in the data
sheet shows the maximum start-up time, which includes the
case where the delay is based on VDD_CORE is valid.
- Changing the HFOSC0 registers is not required.
The registers remain in a default state.
- Refer to the processor-specific data sheet to
select the crystal circuit components.