SPRS881K August 2014 – February 2024 TMS320F28374S , TMS320F28375S , TMS320F28375S-Q1 , TMS320F28376S , TMS320F28377S , TMS320F28377S-Q1 , TMS320F28378S , TMS320F28379S
PRODUCTION DATA
Section 6.12.5.1.1.1 lists the SPI master mode timing requirements. Section 6.12.5.1.1.2 lists the SPI master mode switching characteristics (clock phase = 0). Section 6.12.5.1.1.3 lists the SPI master mode switching characteristics (clock phase = 1). Figure 6-77 shows the SPI master mode external timing where the clock phase = 0. Figure 6-78 shows the SPI master mode external timing where the clock phase = 1.