The EMIF memory map is shown in Table 7-3.
Table 7-3 EMIF Chip Select Memory
Map
EMIF CHIP
SELECT |
SIZE(1) |
START
ADDRESS |
END
ADDRESS |
CLA
ACCESS |
DMA ACCESS |
EMIF1_CS0n -
Data |
256M ×
16 |
0x8000
0000 |
0x8FFF
FFFF |
|
Yes |
EMIF1_CS2n -
Program + Data(2) |
2M ×
16 |
0x0010
0000 |
0x002F
FFFF |
|
Yes |
EMIF1_CS3n -
Program + Data |
512K ×
16 |
0x0030
0000 |
0x0037
FFFF |
|
Yes |
EMIF1_CS4n -
Program + Data |
393K ×
16 |
0x0038
0000 |
0x003D
FFFF |
|
Yes |
(1) Available memory size listed in this table is the maximum
possible size assuming 32-bit memory. This may not apply to other memory sizes
because of pin mux setting. See
Section 5.4.1 to find the available address lines for your use case.
(2) The 2M × 16 size is for a 32-bit interface with the assumption
that 16-bit accesses are not performed; hence, byte enables are not used (tied
to active value on board). If byte enables are used, then the maximum size is
smaller because byte enables are muxed with address pins (see
Section 5.4.1) . If 16-bit
memory is used, then the maximum size is 1M × 16.