SPRSP14E may 2019 – june 2023 TMS320F28384D , TMS320F28384D-Q1 , TMS320F28384S , TMS320F28384S-Q1 , TMS320F28386D , TMS320F28386D-Q1 , TMS320F28386S , TMS320F28386S-Q1 , TMS320F28388D , TMS320F28388S
PRODUCTION DATA
The EMIF1 memory map is the same for both CPU subsystems. EMIF2 is available only on the CPU1 subsystem. The EMIF memory map is shown in the EMIF Chip Select Memory Map table.
EMIF CS | SIZE(3) | START ADDRESS | END ADDRESS | CLA ACCESS | DMA ACCESS |
---|---|---|---|---|---|
EMIF1 CS0n - Data(1) | 256M x 16 | 0x8000 0000 | 0x8FFF FFFF | Yes | |
EMIF1 CS0n - Program + Data(1) | 1M x 16 | 0x0020 0000 | 0x002F FFFF | Yes | |
EMIF1 CS2n - Program + Data | 2M x 16 | 0x0010 0000 | 0x002F FFFF | Yes | |
EMIF1 CS3n - Program + Data | 512K x 16 | 0x0030 0000 | 0x0037 FFFF | Yes | |
EMIF1 CS4n - Program + Data | 393K x 16 | 0x0038 0000 | 0x003D FFFF | Yes | |
EMIF2 CS0n - Data(2) | 32M x 16 | 0x9000 0000 | 0x91FF FFFF | ||
EMIF2 CS2n - Program + Data(2) | 4K x 16 | 0x0000 2000 | 0x0000 2FFF | Yes (Data only) |