SPRSP35K February 2019 – April 2024 DRA829J , DRA829J-Q1 , DRA829V , DRA829V-Q1
PRODUCTION DATA
This section describes the operating conditions of the device. This section also contains the description of each Operating Performance Point (OPP) for processor clocks and device core clocks.
Table 6-1 describes the maximum supported frequency per speed grade for the device.
DEVICE | MAXIMUM FREQUENCY (MHz) | ||||||||
---|---|---|---|---|---|---|---|---|---|
A72SS0 | C66SS0 | C71SS0 | R5SS0/1 | MCU_ R5SS0 |
GPU | CBASS0 | DMSC | LPDDR4 | |
DRA829xT | 2000 | 1350 | 1000 | 1000 | 1000 | 750 | 500 | 333 | 4266 MT/s(1) |