10 Revision History
Changes from January 30, 2023 to May 1, 2024 (from Revision F (January 2023) to Revision G (May 2024))
- (Features): Updated ALX package description from SIP to OvermoldedGo
- (Features): Updated/Changed the Functional Safety bullets to include the received Functional Safety-Compliant certificationGo
-
Global: Moved the Revision History section to the back of the
documentGo
- (Applications): Adding Factory Automation Robots, Industrial &
Collaborative Robots, Industrial Mobile Robots, and Home Automation Robots
bulletsGo
- (Pin Connectivity Requirements): Updated the second paragraph of the note following the Connectivity Requirements table. The update clarifies the operation of configurable device IOs and includes precautions that must be taken to prevent floating signals from damaging device input buffersGo
- (Speed Grade Maximum Frequency): Increased ICSSG from 250MHz to 333MHz for Speed Grade KGo
- (SDIO Electrical Characteristics): Changed VDDSHV5 power rail name,
where applicable, used to define the
VIL/VILSS/VIH/VIHSS/VOL/VOH
parameter values by referencing a generic power rail name (VDD), and added an
associated table noteGo
- (DDR Electrical Characteristics): Added references to the respective
JEDEC standardsGo
- (Power-Up Sequencing): Separated VDDSHV5 in Power-Up Sequencing diagram with footnote to clarify the power rail supports power-up, power-down, or dynamic voltage change without any dependency on other power rails.Go
- (Power-Down Sequencing): Separated VDDSHV5 in Power-Down Sequencing diagram with footnote to clarify the power rail supports power-up, power-down, or dynamic voltage change without any dependency on other power rails.Go
- (Reset Timing Conditions): Changed the Input slew rate minimum values for VDD = 1.8V and VDD = 3.3V (original values were swapped)Go
- (MCU_RESETSTATz, and RESETSTATz Switching Characteristics): Changed the minimum value of parameter RST13 from "0" to "960".Go
- (CPSW3G MDIO Timing): Included PCB Connectivity Requirements in the Timing
Conditions table, changed the minimum setup time value (parameter MDIO1) from "90" to
"45", and changed the minimum and maximum output delay time values (parameter MDIO7) from
"-150" and "150" to "-10" and "10" respectivelyGo
- (MCSPI Switching Characteristics - Controller Mode): Replaced
previous table notes 2 and 3 with new table notes 2, 3, 4, and
5Go
- (Switching Characteristics for MMC1 – UHS-I SDR104 Mode): Changed
the minimum values for SDR1046 and SDR1047 from 2.08 to 2.12, the minimum values
for SDR1048 and SDR1049 from 1.12 to 1.08, and maximum values for SDR1048 and
SDR1049 from 3.16 to 3.2Go
- (OSPI Switching Characteristics – PHY Data Training): Added maximum
values to the OSPI0_CLK Cycle Time parameter (O1) to define a minimum operating
frequency of 133MHz. Also updated Note 1 and Note 4, where "in ns" was added to
the OSPI_CLK cycle time reference in Note 1 and "refclk" was changed to
"reference clock" in Note 4 so it matches the clock name used in the
TRMGo
- (OSPI0 Switching Characteristics – PHY SDR Mode): Updated Note 1 and
Note 4, where "in ns" was added to the OSPI_CLK cycle time reference in Note 1
and "refclk" was changed to "reference clock" in Note 4 so it matches the clock
name used in the TRMGo
- (OSPI0 Switching Characteristics – PHY DDR Mode): Updated Note 1 and
Note 4, where "in ns" was added to the OSPI_CLK cycle time reference in Note 1
and "refclk" was changed to "reference clock" in Note 4 so it matches the clock
name used in the TRMGo
- (OSPI0 Timing Requirements – Tap SDR Mode): Updated the constant
values associated with the minimum setup and minimum hold formulas in parameters
O19 and O20. Note 2 was also updated to change "refclk" to "reference clock" so
it matches the clock name used in the TRMGo
- (OSPI0 Switching Characteristics – Tap SDR Mode): Updated Note 1 and
Note 4, where "in ns" was added to the OSPI_CLK cycle time reference in Note 1
and "refclk" was changed to "reference clock" in Note 4 so it matches the clock
name used in the TRMGo
- (OSPI0 Timing Requirements – Tap DDR Mode): Updated the constant
values associated with the minimum setup and minimum hold formulas in parameters
O13 and O14. Note 2 was also updated to change "refclk" to "reference clock" so
it matches the clock name used in the TRMGo
- (OSPI0 Switching Characteristics – Tap DDR Mode): Updated the
minimum data output delay and maximum data output delay formulas in parameter
O6. Also updated Note 1 and Note 5, where "in ns" was added to the OSPI_CLK
cycle time reference in Note 1 and "refclk" was changed to "reference clock" in
Note 5 so it matches the clock name used in the TRMGo
- (PCIe): Updated the "For more details about features and ..."
paragraph.Go
- (PRUSS PRU Switching Characteristics – Direct Output Mode): Changed
the maximum skew value for the GPO to GPO parameter (PRDO1) from 3ns to
2nsGo
- (PRU_ICSSG UART Switching Characteristics): Added the TRM UART baud
rate settings reference to Note 1Go
- (USB): Updated the "For more details about features and ..."
paragraph.Go
- (USB VBUS Design Guidelines): Changed the 3.5 kΩ resistor value to 3.48kΩ
since 3.5kΩ is not a standard value for 1% resistorsGo