For more details about features and additional
description information on the device Gigabit
Ethernet MAC, see the corresponding subsections
within Signal Descriptions and Detailed
Description sections.
Note: CPSW3G MDIO0, CPSW3G RMII1, CPSW3G
RMII2, and CPSW3G RGMII1 have one or more signals which can be multiplexed to more
than one pin. Timing requirements and switching characteristics defined in this
section are only valid for specific pin combinations known as IOSETs. Valid pin
combinations or IOSETs for these interfaces can be found in the tables of the
CPSW3G
IOSETs section.