SPRU514Z July 2001 – October 2023 SM320F28335-EP
Table 7-4 shows all of the status fields used by the compiler. Presumed value is the value the compiler expects in that field upon entry to, or return from, a function; a dash in this column indicates the compiler does not expect a particular value. The modified column indicates whether code generated by the compiler ever modifies this field. See the TMS320C28x CPU and Instruction Set Reference Guide (SPRU430) for details about status registers.
Field | Name | Presumed Value | Modified |
---|---|---|---|
ARP | Auxiliary Register Pointer | - | Yes |
C | Carry | - | Yes |
N | Negative flag | - | Yes |
OVM | Overflow mode | 0(1) | Yes |
PAGE0 | Direct/stack address mode | 0(1) | No |
PM | Product shift mode | 1(1) (2) | Yes |
SPA | Stack pointer align bit | - | Yes (in interrupts) |
SXM | Sign extension mode | - | Yes |
TC | Test/control flag | - | Yes |
V | Overflow flag | - | Yes |
Z | Zero flag | - | Yes |
Table 7-5 shows the additional status fields used by the compiler for FPU targets. See the TMS320C28x Extended Instruction Sets Technical Reference Manual (SPRUHS1) for details about these registers.
Field | Name | Presumed Value | Modified |
---|---|---|---|
LVF(2) (3) | Latched overflow float flag | - | Yes |
LUF(2) (3) | Latched underflow float flag | - | Yes |
NF(2) | Negative float flag | - | Yes |
ZF(2) | Zero float flag | - | Yes |
NI(2) | Negative integer flag | - | Yes |
ZI(2) | Zero integer flag bit | - | Yes |
TF(2) | Test flag bit | - | Yes |
RNDF32 | Round F32 mode(4) | - | Yes |
RNDF64 | Round F64 mode(4) | - | Yes |
SHDWS | Shadow mode status | - | Yes |
All other status register fields are not used and do not affect code generated by the compiler.