SPRU514Z July 2001 – October 2023 SM320F28335-EP
These intrinsics perform faster floating point calculations using the 32-bit (FPU32) and 64-bit (FPU64) hardware. These intrinsics are enabled if the --float_support compiler option is set to fpu32 or fpu64, respectively.
If you are using the COFF ABI, arguments and return values listed as floats may also use doubles, because both are 32-bit types. The FPU32 intrinsics are supported, but the FPU64 intrinsics are not supported if you are using the COFF ABI. An error occurs if you use the FPU64 intrinsics with long doubles when using COFF.
If you are using EABI, the float type is 32-bit and the double type is 64-bit. If FPU32 is enabled, use only the FPU32 versions. In general, if FPU64 is enabled, you may use both FPU32 and FPU64 intrinsics. However, in EABI mode with FPU64, there is no instruction that swaps two 32-bit floats. On FPU32 hardware, the SWAPF assembly instruction works only on 32-bit floats and the __swapf and __swapff intrinsics are equivalent. On FPU64 hardware, the SWAPF instruction works only 64-bit doubles; the __swapf intrinsic is supported but the __swapff intrinsic causes an error.
See Section 7.6.1 for intrinsics that reinterpret floats and doubles as registers (and vice versa).
FPU Version | Intrinsic | Assembly Instruction(s) | Description |
---|---|---|---|
FPU32 | float __einvf32( float x); | EINVF32x | Compute and return 1/x to about 8 bits of precision. |
FPU64 | double __einvf64( double x); | EINVF64 x | Compute and return 1/x to about 8 bits of precision. |
FPU32 | float __eisqrtf32( float x); | EISQRTF32x | Find the square root of 1/x to about 8 bits of precision. |
FPU64 | double __eisqrtf64( double x); | EISQRTF64 x | Find the square root of 1/x to about 8 bits of precision. |
FPU32 | void __f32_max_idx( float &dst, float src, float &idx_dst, float idx_src ); | MAXF32dst, src || MOV32 idx_dst, idx_src | If src>dst, copy src to dst, and copy idx_src to idx_dst. |
FPU64 | void __f64_max_idx( double &dst, double src, double &idx_dst, double idx_src ); | MAXF64 dst, src || MOV64 idx_dst, idx_src | If src>dst, copy src to dst, and copy idx_src to idx_dst. |
FPU32 | void __f32_min_idx( float &dst, float src, float &idx_dst, float idx_src ); | MINF32dst, src || MOV32 idx_dst, idx_src | If src<dst, copy src to dst, and copy idx_src to idx_dst. |
FPU64 | void __f64_min_idx( double &dst, double src, double &idx_dst, double idx_src ); | MINF64 dst, src || MOV64 idx_dst, idx_src | If src<dst, copy src to dst, and copy idx_src to idx_dst. |
FPU32 | int __f32toi16r(float src); | F32TOI16R dst, src | Convert float to int and round. |
FPU32 | unsigned int __f32toui16r(float src); | F32TOUI16R dst, src | Convert float to unsigned int and round. |
FPU32 | float __fmax( float x, float y ); (1) | MAXF32y, x | If x>y, copy x to y. |
FPU32 | float __fmin( float x, float y ); (1) | MINF32y, x | If x<y, copy x to y. |
FPU32 | float __fracf32(float src); | FRACF32 dst, src | Return the fractional portion of src. |
FPU64 | double __fracf64(double src); | FRACF64 dst, src | Return the fractional portion of src. |
FPU32 | float __fsat(float val, float max, float min ); | MAXF32dst,
min
MINF32 dst, max | Return val if min < val < max. Else return min if val < min. Else return max if val > max. Calling __fsat with max < min results in undefined behavior. |
FPU32 (only) | void __swapff( float &a, float &b ); | SWAPFa, b | Swap the contents of a and b. |
FPU32 (only) | void __swapf( float &a, float &b ); | SWAPFa, b | Swap the contents of a and b. |
FPU64 | void __swapf( double &a, double &b ); | SWAPF a, b | Swap the contents of a and b. |