SPRU514Z July 2001 – October 2023 SM320F28335-EP
These options are specific to the TMS320C28x toolset. See the referenced sections for more information. TMS320C28x-specific assembler options are listed in Section 2.3.11.
The C28x compiler supports both the COFF ABI and the Embedded Application Binary Interface (EABI) ABI. EABI uses the ELF object format and the DWARF debug format.
--abi={eabi|coffabi} | Specifies the application binary interface (ABI). The
default ABI is COFF. EABI is also supported. See Section 2.13. Refer to the C28x Embedded
Application Binary Interface (SPRAC71) application report. All code in an EABI application must be built for EABI. Make sure all your libraries are available in EABI mode before migrating your existing COFF ABI systems to EABI. |
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--cla_support={cla0|cla1|cla2} | Specifies TMS320C28x Control Law Accelerator (CLA) Type 0, Type 1, or Type 2 support. This option is used to compile or assemble code written for the CLA. This option does not require any special library support when linking; the libraries used for C28x with/without FPU support should be sufficient. | |
--float_support={ fpu32 | fpu64 | softlib } | Specifies use of TMS320C28x 32-bit or 64-bit
hardware floating-point support. Using
--float_support=fpu32 specifies the C28x architecture with 32-bit
hardware floating-point support. Using --float_support=fpu64
specifies the C28x architecture with 64-bit hardware
floating-point support. FPU64 is supported only when using
EABI. |
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If the --tmu_support option is used to enable support for the Trigonometric Math Unit, the --float_support option is automatically set to fpu32. The default is softlib, which performs floating-point calculations without special hardware support. | ||
--idiv_support={ none | idiv0 } | Enables support for fast integer division using
hardware extensions to provide a set of instructions to accelerate
integer division. If this hardware is available, use
--idiv_support=idiv0 to cause these instructions to be used. The
default is none. Datasheets for devices that include this hardware
contain the words "Support for Fast Integer Division (FINTDIV)."
(EABI only.) When this option is enabled, the built-in integer division and modulo operators ("/" and "%") use the appropriate faster instructions. See Section 7.8.2 for more about such cases. When this option
is enabled, you can also use the fast integer division
intrinsics described in Section 7.6.4. In order to use these intrinsics, your code must include the
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--no_rpt | Prevents the compiler from generating repeat (RPT) instructions. By default, repeat instructions are generated for certain memcpy, division, and multiply-accumulate operations. However, repeat instructions are not interruptible. | |
--pending_instantiations=# | Specify the number of template instantiations that may be in progress at any given time. Use 0 to specify an unlimited number. | |
--protect_volatile=num | Enables volatile reference protection. Pipeline
conflicts may occur between non-local variables that have been
declared volatile. A conflict can occur between a write to one
volatile variable that is followed by a read from a different
volatile variable. The --protect_volatile option allows at least
num instructions to be placed between the two volatile
references to ensure the write occurs before the read. The num is
optional. If no num is given, the default value is 2. For example,
if --protect_volatile=4 is used, volatile writes and volatile reads
are protected by at least 4 instructions. The peripheral pipeline protection hardware protects all internal peripherals and XINTF zone 1. If you connect peripherals to Xintf zone 0, 2, 6, 7 then you may need to use the --protect_volatile option. Hardware protection or using this option is not required for memories. |
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--ramfunc={on|off} | If set to on, specifies that all functions should be placed in the .TI.ramfunc section, which is placed in RAM. If set to off, only functions with the ramfunc function attribute are treated this way. See Section 6.15.2. | |
Newer TI linker command files support the --ramfunc option automatically by placing functions in the .TI.ramfunc section. If you have a linker command file that does not include a section specification for the .TI.ramfunc section, you can modify the linker command file to place this section in RAM. See the TMS320C28x Assembly Language Tools User's Guide for details on section placement. | ||
--rpt_threshold=k | Generates RPT loops that iterate k times or less (k is a constant between 0 and 256). Multiple RPT’s may be generated for the same loop, if iteration count is more than k and if code size does not increase too much. Using this option when optimizing for code size disables RPT loop generation for loops whose iteration count can be greater than k. | |
Note that inlined memcpy calls now support >255 words through the use of RPT with a register operand. This allows inlining of memcpy of up to 65535 words. If you set the --no_rpt or --rpt_threshold option, such inlining is disabled or reduced, respectively. The maximum value that may be specified with --rpt_threshold is still 256. | ||
--silicon_errata_fpu1_ workaround=on|off |
Enabling this option prevents FPU register write
conflicts that can occur during certain instructions. CPU-to-FPU
register writes cannot occur during FRACF32, F32TOUI32, or UI16TOF32
instructions. If you enable this option, the compiler adds five NOP
instructions before these instructions to prevent conflicts. This option is disabled by default if any of the following options are enabled: --float_support=fpu64, --tmu_support, or --vcu_support=vcu2|vcrc. |
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--silicon_version=28 | Generates code for the TMS320C28x architecture. The only value accepted is 28. This is the default, so this option is no longer required on command lines. | |
--unified_memory | Use the --unified_memory (-mt) option if your memory map is configured as a single unified space; this allows the compiler to generate RPT PREAD instructions for most memcpy calls and structure assignments. This also allows MAC instructions to be generated. The --unified_memory option also allows more efficient data memory instructions to be used to access switch tables. Even with unified memory, memory for some peripherals and some RAM associated with those peripherals is allocated only in data memory. | |
If –unified_memory is enabled, you can prevent program memory address access to specific symbols by declaring symbols as volatile. Struct assigns between volatile and non-volatile symbols have different effects on the instructions used depending on the direction of the assignment. Struct assigns from non-volatile to volatile can use RPT with PREAD, which uses the program bus to read the non-volatile source operand. Struct assigns from volatile to non-volatile can use RPT with PWRITE, which uses the program bus to write to the non-volatile destination operand. | ||
--tmu_support[=tmu0|tmu1] | Enables support for the Trigonometric Math Unit (TMU). Using this option automatically enables FPU32 support (as with the --float_support=fpu32 option). When TMU support is enabled, intrinsics are available to perform trigonometric instructions on the TMU. | |
There are algorithmic differences between the TMU hardware instructions and the library routines, so the results of operations may differ slightly. | ||
The tmu1 setting is available with EABI only. The tmu1 setting adds support for the LOG2F32 and IEXP2F32 intrinsics in addition to the intrinsics supported with the tmu0 setting. | ||
In relaxed floating point mode, RTS library calls are replaced with the corresponding TMU hardware instructions for the following floating-point operations: floating point division, sqrt, sin, cos, atan, and atan2. Additionally, if the --tmu_support=tmu1 option is used with --fp_mode=relaxed, special versions of the following 32-bit float math functions are used: exp2f(), expf(), log2f(), logf(), and powf(). Relaxed versions that work with EABI's 64-bit double types are not provided. | ||
--vcu_support[=vcu0|vcu2|vcrc] | The vcu0 and vcu2 settings specify there is support for Type 0 or Type 2 of the Viterbi, Complex Math and CRC Unit (VCU). Note that there is no VCU Type 1. The default is vcu0. | |
The vcrc setting specifies support for Cyclic Redundancy Check (CRC) algorithms only. Support for vcrc is available only if FPU32 or FPU64 is used. | ||
This option is useful only if the source is in assembly code, written for the VCU. The option is ignored for C/C++ code. This option does not need any special library support when linking; the libraries used for C28x with/without VCU support should be sufficient. Also note that there is no VCU Type 1. |