SPRUI30H November 2015 – May 2024 DRA745 , DRA746 , DRA750 , DRA756
Table 3-319 lists the clock domain modes supported by the clock domain.
NO_SLEEP | SW_SLEEP | SW_WKUP | HW_AUTO |
---|---|---|---|
Available | N/A | Available | Available |
Table 3-320 lists the clock domain state transition control and status bits for the clock in this clock domain.
Parameter Name | Control/Status Bit Field |
---|---|
RTC_L4_GICLK Clock Status | CM_RTC_CLKSTCTRL[8] CLKACTIVITY_RTC_L4_GICLK |
RTC_AUX_CLK Clock Status | CM_RTC_CLKSTCTRL[10] CLKACTIVITY_RTC_AUX_CLK |
Clock Domain State Transition Control | CM_RTC_CLKSTCTRL[1:0] CLKTRCTRL |