SPRUI30H November 2015 – May 2024 DRA745 , DRA746 , DRA750 , DRA756
The PAT block maps physical pages to each TILER container page. The internal address translation memories used in the PAT block are designed with RFFs. It consists of:
A PAT descriptor is a singly-linked list node (see Figure 15-9) that contains:
PAT descriptors are chained and processed until a NULL pointer is encountered. The PAT bank allocation scheme allows the updating of four consecutive entries of a line in a single cycle regardless of the refilling orientation.
The PAT descriptor structure directly maps the following registers (where i = 0 to 3):
The PAT refill engine can be started either of the following:
The data part of the PAT refill starts only when the DMM_PAT_CTRL_i[0] START bit is asserted.
The DMM_PAT_STATUS_i register can be used to determine whether the process has completed without errors.