SPRUI30H November 2015 – May 2024 DRA744 , DRA745 , DRA746 , DRA750 , DRA756
Address Offset | 0x0000 0000 | ||
Physical Address | 0x4A0F 6000 | Instance | Spinlock |
Description | This register contains the IP revision code | ||
Type | R |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
REVISION |
Bits | Field Name | Description | Type | Reset |
---|---|---|---|---|
31:0 | REVISION | IP revision | R | TI internal data |
Address Offset | 0x0000 0010 | ||
Physical Address | 0x4A0F 6010 | Instance | Spinlock |
Description | This register controls the various parameters of the OCP interface. Note that most fields are read-only. | ||
Type | RW |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | SIDLEMODE | ENWAKEUP | SOFTRESET | AUTOGATING |
Bits | Field Name | Description | Type | Reset |
---|---|---|---|---|
31:5 | RESERVED | Reserved. Reads return 0. | R | 0x0000000 |
4:3 | SIDLEMODE | Slave interface power management (IDLE request/acknowledgement control). | R | 0x2 |
Read 0x0: Force-idle. IDLE request is acknowledged unconditionally and immediately. | ||||
Read 0x1: No-idle. IDLE request is never acknowledged. | ||||
Read 0x2: Smart-idle. IDLE request acknowledgement is based on the internal module activity. | ||||
Read 0x3: Reserved. Do not use. | ||||
2 | ENWAKEUP | Asynchronous wakeup gereration. | R | 0 |
Read 0x0: Wakeup generation is disabled. | ||||
Read 0x1: Wakeup generation is enabled. | ||||
1 | SOFTRESET | Module software reset. | W | 0 |
Write 0x0: No action | ||||
Write 0x1: Start soft reset sequence | ||||
0 | AUTOGATING | Internal interface clock gating strategy. | R | 1 |
Read 0x0: Interface clock is not gated when the interface is idle. | ||||
Read 0x1: Automatic internal OCP clock gating strategy is applied, based on the OCP interface activity. |
Address Offset | 0x0000 0014 | ||
Physical Address | 0x4A0F 6014 | Instance | Spinlock |
Description | This register provides status information about this instance of the Spinlock module. | ||
Type | R |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
NUMLOCKS | RESERVED | IU7 | IU6 | IU5 | IU4 | IU3 | IU2 | IU1 | IU0 | RESERVED | RESETDONE |
Bits | Field Name | Description | Type | Reset |
---|---|---|---|---|
31:24 | NUMLOCKS | Number of lock registers implemeted. | R | 0x08 |
Read 0x1: This instance has 32 lock registers. | ||||
Read 0x2: This instance has 64 lock registers. | ||||
Read 0x4: This instance has 128 lock registers. | ||||
Read 0x8: This instance has 256 lock registers. | ||||
23:16 | RESERVED | Reserved. Reads return 0. | R | 0x00 |
15 | IU7 | In-Use flag 0, covering lock registers 224 - 255. | R | 0 |
Read 0x0: All lock registers 224 - 255 are in the Not Taken state. | ||||
Read 0x1: At least one of the lock registers 224 - 255 is in the Taken state. | ||||
14 | IU6 | In-Use flag 0, covering lock registers 192 - 223. | R | 0 |
Read 0x0: All lock registers 192 - 223 are in the Not Taken state. | ||||
Read 0x1: At least one of the lock registers 192 - 223 is in the Taken state. | ||||
13 | IU5 | In-Use flag 0, covering lock registers 160 - 191. | R | 0 |
Read 0x0: All lock registers 160 - 191 are in the Not Taken state. | ||||
Read 0x1: At least one of the lock registers 160 - 191 is in the Taken state. | ||||
12 | IU4 | In-Use flag 0, covering lock registers 128 - 159. | R | 0 |
Read 0x0: All lock registers 128 - 159 are in the Not Taken state. | ||||
Read 0x1: At least one of the lock registers 128 - 159 is in the Taken state. | ||||
11 | IU3 | In-Use flag 0, covering lock registers 96 - 127. | R | 0 |
Read 0x0: All lock registers 96 - 127 are in the Not Taken state. | ||||
Read 0x1: At least one of the lock registers 96 - 127 is in the Taken state. | ||||
10 | IU2 | In-Use flag 0, covering lock registers 64 - 95. | R | 0 |
Read 0x0: All lock registers 64 - 95 are in the Not Taken state. | ||||
Read 0x1: At least one of the lock registers 64 - 95 is in the Taken state. | ||||
9 | IU1 | In-Use flag 0, covering lock registers 32 - 63. | R | 0 |
Read 0x0: All lock registers 32 - 63 are in the Not Taken state. | ||||
Read 0x1: At least one of the lock registers 32 - 63 is in the Taken state. | ||||
8 | IU0 | In-Use flag 0, covering lock registers 0 - 31. | R | 0 |
Read 0x0: All lock registers 0 - 31 are in the Not Taken state. | ||||
Read 0x1: At least one of the lock registers 0 - 31 is in the Taken state. | ||||
7:1 | RESERVED | Reserved. Reads return 0. | R | 0x00 |
0 | RESETDONE | Reset done status. | R | 1 |
Read 0x0: Reset in progress. | ||||
Read 0x1: Reset is completed. |
Address Offset | 0x0000 0800 | index | i = 0 to 255 |
Physical Address | 0x4A0F 6800 + (0x4 * i) | Instance | Spinlock |
Description | This register contains the state of one lock. | ||
Type | RW |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | TAKEN |
Bits | Field Name | Description | Type | Reset |
---|---|---|---|---|
31:1 | RESERVED | Reserved. Reads return 0. Writes are ignored. | R | 0x0000 0000 |
0 | TAKEN | Lock State | RW | 0 |
Read 0x0: Lock was previously Not Taken (free). The requester is granted the lock. | ||||
Write 0x0: Set the lock to Not Taken (free). | ||||
Read 0x1: Lock was previously Taken. The requester is not granted the lock and must retry. | ||||
Write 0x1: No update to the lock value. |