SPRUI30H November 2015 – May 2024 DRA745 , DRA746 , DRA750 , DRA756
The module is reinitialized in hardware upon activation of PRCM.L3INIT_RST reset signal ( for more information about hardware reset, see Section 24.8.3, SATA Controller Integration).
For more information on the PRCM.L3INIT_RST hardware reset signal, refer to Reset Domains, in Power, Reset, and Clock Management.
This reset normally occurs on device power up or during a system bus failure. All components of the SATA AHCI core are initialized, including the HBA port and generic registers. The bus interface unit (BIU) and SATA AHCI core wrapper components are also impacted.