SPRUI30H November 2015 – May 2024 DRA744 , DRA745 , DRA746 , DRA750 , DRA756
Table 3-186 lists the clock domain modes supported by the clock domain.
NO_SLEEP | SW_SLEEP | SW_WKUP | HW_AUTO |
---|---|---|---|
Available | Available | Available | Available |
Table 3-187 lists the clock domain state transition control and status bits for the clock in this clock domain.
Parameter Name | Control/Status Bit Field |
---|---|
IVA_GCLK Clock Status | CM_IVA_CLKSTCTRL[8] CLKACTIVITY_IVA_GCLK |
Clock Domain State Transition Control | CM_IVA_CLKSTCTRL[1:0] CLKTRCTRL |