SPRUI30H November 2015 – May 2024 DRA745 , DRA746 , DRA750 , DRA756
Three operating modes are defined for the module:
If the debounce clock provided by the PRCM module is active, the debounce cell can sample and filter the input to generate a wake-up event. If the debounce clock is inactive, the debounce cell gates all input signals and thus cannot be used.
Idle mode is configured within the module and activated on request by the host processor through sideband signals (see Section 27.4.5.2.3, System Power Management and Wakeup).
The disabled mode is set by software through a dedicated configuration bit, GPIOi.GPIO_CTRL[0] DISABLEMODULE (0: The module is enabled and clocks are not gated; 1: The module is disabled and clocks are gated). It unconditionally gates the internal clock paths that are not used for the system interface. When setting the GPIO_CTRL[0] DISABLEMODULE bit (enabling or disabling the GPIO module), it is important to switch the debouncing clock on or off in the following order: