The data flow for receive channels is as follows:
- After MLBSS is configured (see Section 24.12.5.1.2.1) and MediaLB has synchronized to the incoming MediaLB framesync (MLB_MLBC0[7] MLBLK = 0x1), serial data is received either through the mlbp_dat_p and mlbp_dat_n pads or through the mlb_dat pad, depending on the pin mode (6-pin or 3-pin) selected.
- The MLBSS logic writes incoming data to the appropriate buffer in the data buffer RAM. The data buffer RAM address to which data is written is the BA field of the channel descriptor table entry. The channel descriptor table entry is specified by the CL field of the MediaLB channel allocation table entry for the channel. The MediaLB channel allocation table entry equals (1/2)*ChannelAddr.
- The DMA access for a particular DMA channel (DMA channel allocation table entry) is started when there is sufficient data for the DMA channel in the data buffer RAM to write into system memory and the system memory buffer (ping or pong depending on the PG bit in DMA descriptor table entry) is marked as ready. Note that presence of a frame for synchronous/isochronous traffic (multiple frames in multi frame mode) or a packet for control/asynchronous traffic (multiple packets in multi packet mode) is deemed sufficient data to mark a DMA channel as ready.
- The DMA hardware reads from the data buffer RAM memory address specified by the BA field of the channel descriptor table entry and writes to the system memory address specified in the DMA descriptor table. The CL field in the DMA channel allocation table entry is used to determine the appropriate channel descriptor table entry. Note that CL field of DMA channel allocation table and MLB channel allocation table entries must be the same, thus providing the common data buffer RAM address for MLB core to write into DMA and the DMA to read from the MLB core. Further, each DMA channel allocation table entry corresponds to a DMA descriptor table entry as per the following mapping:
- Address of DMA descriptor table entry = 0x40 + Index of DMA channel allocation table entry.