SPRUI30H November 2015 – May 2024 DRA745 , DRA746 , DRA750 , DRA756
The examples in Section 15.4.6.1.2.1 through Section 15.4.6.1.2.3 are based on a clock rate of 104 MHz. Refer to the device Data Manual for the maximum frequency appropriate for this device and to the memory datasheet for the maximum frequency for the particular memory device.
The clock runs at 104 MHz ( f = 104 MHz; T = 9, 615 ns).
Table 15-461 shows the timing parameters (on the memory side) that determine the parameters on the GPMC side.
Table 15-462 shows how to calculate timings for the GPMC using the memory parameters.
Figure 15-101 shows the synchronous burst read access.
AC Read Characteristics on the Memory Side | Description | Duration (ns) |
---|---|---|
tCES | nCS setup time to clock | 0 |
tACS | Address setup time to clock | 3 |
tIACC | Synchronous access time | 80 |
tBACC | Burst access time valid clock to output delay | 5,2 |
tCEZ | Chip-select to High-Z | 7 |
tOEZ | Output enable to High-Z | 7 |
tAVC | nADV setup time | 6 |
tAVD | nAVD pulse | 6 |
tACH | Address hold time from clock | 3 |
The following terms, which describe the timing interface between the controller and its attached device, are used to calculate the timing parameters on the GPMC side:
Parameter Name on GPMC Side | Formula | Duration (ns) | Number of Clock Cycles (F = 104 MHz) | GPMC Register Configurations |
---|---|---|---|---|
GPMC FCLK Divider | – | – | – | GPMCFCLKDIVIDER = 0x0 |
ClkActivation Time | min ( tCES, tACS) | 3 | 1 | CLKACTIVATIONTIME = 0x1 |
RdAccessTime | roundmax (ClkActivationTime + tIACC + DataSetupTime) | 94.03: (9,615 + 80 + 4,415) | 10: roundmax (94.03 / 9,615) | RDACCESSTIME = 0x0A |
PageBurst RdAccessTime | roundmax (tBACC) | roundmax (5.2) | 1 | PAGEBURSTACCESSTIME = 0x1 |
RdCycleTime | RdAccess time + max ( tCEZ, tOEZ) | 101.03: (94.03 + 7) | 11 | RDCYCLETIME = 0x0B |
CsOnTime | tCES | 0 | 0 | CSONTIME = 0x0 |
CsReadOffTime | RdCycleTime | - | 11 | CSRDOFFTIME = 0x0B |
AdvOnTime | tAVC (1) | 0 | 0 | ADVONTIME = 0x0 |
AdvRdOffTime | tAVD + tAVC (2) | 12 | 2 | ADVRDOFFTIME = 0x02 |
OeOnTime (3) | (ClkActivationTime + tACH) < OeOnTime (ClkActivationTime + tIACC) | – | 3, for instance | OEONTIME = 0x3 |
OeOffTime | RdCycleTime | – | 11 | OEOFFTIME = 0x0B |