SPRUI30H November 2015 – May 2024 DRA745 , DRA746 , DRA750 , DRA756
The counter is enabled by writing to TSCL. The value written is ignored. Counting begins in the cycle after the MVC instruction executes. If executed with the count disabled, the following code sequence shows the timing of the count starting (assuming no stalls occur in the three cycles shown).
MVC 0, TSCL ; Start the counter
MVC TSCL, R0 ; R0 = 0
MVC TSCL, R1 ; R1 = 1