SPRUI30H November 2015 – May 2024 DRA745 , DRA746 , DRA750 , DRA756
The channel table RAM is 128-bit × 144-entry (max). It allows system software to dynamically configure channel routing and allocate data buffers in the data buffer RAM.
The channel table RAM is logically divided into three sub-tables:
The details of the channel descriptor table and channel allocation table are described in Table 24-1460.
The details of the DMA descriptor table are described in Table 24-1470.
Label | Address | Bits 127:96 | Bits 95:64 | Bits 63:32 | Bits 31:0 | ||||
---|---|---|---|---|---|---|---|---|---|
Channel Descriptor Table (CDT): | |||||||||
Channel descriptor table | 0x00 | CDT0[127:0], CL = 0 | |||||||
0x01 | CDT1[127:0], CL = 1 | ||||||||
0x02 | CDT2[127:0], CL = 2 | ||||||||
… | … | ||||||||
0x3D | CDT61[127:0], CL = 61 | ||||||||
0x3E | CDT62[127:0], CL = 62 | ||||||||
0x3F | CDT63[127:0], CL = 63 | ||||||||
DMA Descriptor Table (DDT): | |||||||||
DMA descriptor table | 0x40 | DDT0[127:0], CAT64 | |||||||
0x41 | DDT1[127:0], CAT65 | ||||||||
0x42 | DDT2[127:0], CAT66 | ||||||||
… | … | ||||||||
0x7D | DDT61[127:0], CAT125 | ||||||||
0x7E | DDT62[127:0], CAT126 | ||||||||
0x7F | DDT63[127:0], CAT127 | ||||||||
Channel Allocation Table (CAT): | |||||||||
Channel allocation table for MediaLB | 0x80 | CAT7 | CAT6 | CAT5 | CAT4 | CAT3 | CAT2 | CAT1 | CAT0 |
... | ... | ... | ... | ... | ... | ... | ... | ... | |
0x87 | CAT63 | CAT62 | CAT61 | CAT60 | CAT59 | CAT58 | CAT57 | CAT56 | |
Channel allocation table for DMA | 0x88 | CAT71 | CAT70 | CAT69 | CAT68 | CAT67 | CAT66 | CAT65 | CAT64 |
... | ... | ... | ... | ... | ... | ... | ... | ... | |
0x8F | CAT127 | CAT126 | CAT125 | CAT124 | CAT123 | CAT122 | CAT121 | CAT120 |
A fixed relationship between DMA descriptor table entries and DMA channel allocation table entries exists. When using DMA channel 0 (CAT64) software should program DDT0. When using DMA channel 1 (CAT65) software should program DDT1, in case of CAT66 DDT2 should be programmed and so on. In case of CAT127 software should program DDT63.
The following base addresses are valid: