SPRUIE9D May 2017 – May 2024 DRA74P , DRA75P , DRA76P , DRA77P
Table 27-33 describes the DATA lines reset.
Step | Access Type | Register/Bit Field/Programming Model | Value |
---|---|---|---|
Initiate DATA lines reset. | W | MMCi.MMCHS_SYSCTL[26] SRD | 0x1 |
Poll the SRD bit until it is set to 0x1. | R | MMCi.MMCHS_SYSCTL[26] SRD | = 0x1 |
Wait until the SRD bit returns to 0x0 (reset procedure is complete). | R | MMCi.MMCHS_SYSCTL[26] SRD | = 0x0 |