SPRUIE9D May 2017 – May 2024 DRA74P , DRA75P , DRA76P , DRA77P
Address Offset | 0x0000 0000 | ||
Physical Address | 0x4A00 5F00 | Instance | CM_CORE_AON__INSTR |
Description | CM profiling identification register | ||
Type | R |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
REVISION |
Bits | Field Name | Description | Type | Reset |
---|---|---|---|---|
31:0 | REVISION | IP revision | R | 0x- (1) |
PRCM Register Manual |
Address Offset | 0x0000 0010 | ||
Physical Address | 0x4A00 5F10 | Instance | CM_CORE_AON__INSTR |
Description | CM profiling system configuartion register | ||
Type | RW |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | RESERVED | IDLEMODE | RESERVED | SOFTRESET |
Bits | Field Name | Description | Type | Reset |
---|---|---|---|---|
31:6 | RESERVED | R | 0x0 | |
5:4 | RESERVED | R | 0x0 | |
3:2 | IDLEMODE | Configuration of the local tartget state management mode | RW | 0x2 |
1 | RESERVED | R | 0x0 | |
0 | SOFTRESET | Software reset | RW | 0x0 |
PRCM Register Manual |
Address Offset | 0x0000 0014 | ||
Physical Address | 0x4A00 5F14 | Instance | CM_CORE_AON__INSTR |
Description | CM profiling status register | ||
Type | R |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | FIFOEMPTY | RESERVED |
Bits | Field Name | Description | Type | Reset |
---|---|---|---|---|
31:9 | RESERVED | R | 0x0 | |
8 | FIFOEMPTY | PM Profiling buffer empty | R | 0x1 |
7:0 | RESERVED | R | 0x0 |
PRCM Register Manual |
Address Offset | 0x0000 0024 | ||
Physical Address | 0x4A00 5F24 | Instance | CM_CORE_AON__INSTR |
Description | CM profiling configuration register | ||
Type | RW |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
CLAIM_3 | CLAIM_2 | CLAIM_1 | RESERVED | RESERVED | RESERVED | MOD_ACT_EN | RESERVED | EVT_CAPT_EN | RESERVED |
Bits | Field Name | Description | Type | Reset |
---|---|---|---|---|
31:30 | CLAIM_3 | Ownership | RW | 0x0 |
29 | CLAIM_2 | Debugger override qualifier | RW | 0x1 |
28 | CLAIM_1 | Current owner | R | 0x0 |
27:24 | RESERVED | R | 0x0 | |
23 | RESERVED | R | 0x0 | |
22:16 | RESERVED | R | 0x0 | |
15 | MOD_ACT_EN | When HIGH the CM Module Activity collection is enabled | RW | 0x0 |
14:8 | RESERVED | R | 0x0 | |
7 | EVT_CAPT_EN | When HIGH the CM events capture is enabled | RW | 0x0 |
6:0 | RESERVED | R | 0x0 |
PRCM Register Manual |
Address Offset | 0x0000 0028 | ||
Physical Address | 0x4A00 5F28 | Instance | CM_CORE_AON__INSTR |
Description | CM profiling class filtering register | ||
Type | RW |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
SNAP_CAPT_EN_1F | SNAP_CAPT_EN_1E | SNAP_CAPT_EN_1D | SNAP_CAPT_EN_1C | SNAP_CAPT_EN_1B | SNAP_CAPT_EN_1A | SNAP_CAPT_EN_19 | SNAP_CAPT_EN_18 | SNAP_CAPT_EN_17 | SNAP_CAPT_EN_16 | SNAP_CAPT_EN_15 | SNAP_CAPT_EN_14 | SNAP_CAPT_EN_13 | SNAP_CAPT_EN_12 | SNAP_CAPT_EN_11 | SNAP_CAPT_EN_10 | RESERVED | SNAP_CAPT_EN_03 | SNAP_CAPT_EN_02 | SNAP_CAPT_EN_01 | SNAP_CAPT_EN_00 |
Bits | Field Name | Description | Type | Reset |
---|---|---|---|---|
31 | SNAP_CAPT_EN_1F | Snapshot capture enable - Class-ID = 0x1F | RW | 0x0 |
30 | SNAP_CAPT_EN_1E | RW | 0x0 | |
29 | SNAP_CAPT_EN_1D | RW | 0x0 | |
28 | SNAP_CAPT_EN_1C | RW | 0x0 | |
27 | SNAP_CAPT_EN_1B | RW | 0x0 | |
26 | SNAP_CAPT_EN_1A | RW | 0x0 | |
25 | SNAP_CAPT_EN_19 | RW | 0x0 | |
24 | SNAP_CAPT_EN_18 | RW | 0x0 | |
23 | SNAP_CAPT_EN_17 | RW | 0x0 | |
22 | SNAP_CAPT_EN_16 | RW | 0x0 | |
21 | SNAP_CAPT_EN_15 | RW | 0x0 | |
20 | SNAP_CAPT_EN_14 | RW | 0x0 | |
19 | SNAP_CAPT_EN_13 | RW | 0x0 | |
18 | SNAP_CAPT_EN_12 | RW | 0x0 | |
17 | SNAP_CAPT_EN_11 | RW | 0x0 | |
16 | SNAP_CAPT_EN_10 | Snapshot capture enable - Class-ID = 0x10 | RW | 0x0 |
15:4 | RESERVED | R | 0x0 | |
3 | SNAP_CAPT_EN_03 | Snapshot capture enable - Class-ID = 0x03 [0x23] | RW | 0x0 |
2 | SNAP_CAPT_EN_02 | Snapshot capture enable - Class-ID = 0x02 [0x22] | RW | 0x0 |
1 | SNAP_CAPT_EN_01 | Snapshot capture enable - Class-ID = 0x01 [0x21] | RW | 0x0 |
0 | SNAP_CAPT_EN_00 | Snapshot capture enable - Class-ID = 0x00 [0x20] | RW | 0x0 |
PRCM Register Manual |
Address Offset | 0x0000 002C | ||
Physical Address | 0x4A00 5F2C | Instance | CM_CORE_AON__INSTR |
Description | CM profiling triggering control register | ||
Type | RW |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | TRIG_STOP_EN | TRIG_START_EN |
Bits | Field Name | Description | Type | Reset |
---|---|---|---|---|
31:2 | RESERVED | R | 0x0 | |
1 | TRIG_STOP_EN | Enable stop capturing CM events from external trigger detection | RW | 0x0 |
0 | TRIG_START_EN | Enable start capturing CM events from external trigger detection | RW | 0x0 |
PRCM Register Manual |
Address Offset | 0x0000 0030 | ||
Physical Address | 0x4A00 5F30 | Instance | CM_CORE_AON__INSTR |
Description | CM profiling sampling window register | ||
Type | RW |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | FCLK_DIV_FACOR | RESERVED | SAMP_WIND_SIZE |
Bits | Field Name | Description | Type | Reset |
---|---|---|---|---|
31:20 | RESERVED | R | 0x0 | |
19:16 | FCLK_DIV_FACOR | FunClk divide factor ranging from 1 to 16 | RW | 0x0 |
15:8 | RESERVED | R | 0x0 | |
7:0 | SAMP_WIND_SIZE | CM events sampling window size | RW | 0x0 |
PRCM Register Manual |