SPRUIE9D May 2017 – May 2024 DRA74P , DRA75P , DRA76P , DRA77P
The DMA module is part of the SIMCOP subsystem in the ISS. Figure 9-187 shows the integration of the DMA in the SIMCOP sybsystem.
Address | Size | Description | Access Control | |
Begin | End | |||
0x0000 0000 | 0x0000 7FFF | 32K | Reserved | |
0x0000 8000 | 0x0000 FFFF | 32K | Image Buffer | Mapping depends on DMA_OFST register Access control handled by SIMCOP_HWSEQ_STEP_SWITCH_i.IMBUFF_* registers. See the SIMCOP Hardware Sequencer and Buffers Module section for more details. |
0x0001 0000 | 0x0001 FFFF | 64K | Reserved | |
0x0002 0000 | 0x0002 3FFF | 16K | Reserved | Mapped to Image Buffers A, B, C & D in previous generations |
0x0002 4000 | 0x0002 4FFF | 4K | Image Buffer | SIMCOP_HWSEQ_STEP_SWITCH_i.IMBUFF_E = DMA |
0x0002 5000 | 0x0002 5FFF | 4K | Image Buffer | SIMCOP_HWSEQ_STEP_SWITCH_i.IMBUFF_F = DMA |
0x0002 6000 | 0x0002 6FFF | 4K | Image Buffer | SIMCOP_HWSEQ_STEP_SWITCH_i.IMBUFF_G = DMA |
0x0002 7000 | 0x0002 7FFF | 4K | Image Buffer | SIMCOP_HWSEQ_STEP_SWITCH_i.IMBUFF_H = DMA |
Module Instance | Attributes | |
Power Domain | Interconnect | |
DMA | PD_EVE3 | L3_MAIN via ISS interconnect |
Clocks | ||||
Module Instance | Destination Signal Name | Source Signal Name | Source | Description |
DMA | DMA_FCLK | ISS_MAIN_FCLK | ISS | Functional clock. It is used by all ISS sub-modules and ISS top level resources. |
Resets | ||||
Module Instance | Destination Signal Name | Source Signal Name | Source | Description |
DMA | DMA_RST | ISS_RST | ISS | ISS and SIMCOP global reset |
For information about clock and reset management, see Section 9.4.1.2.1, ISS SIMCOP Local Power and Clock Management.
Interrupt Requests | ||||
Module Instance | Source Signal Name | Destination Signal Name | Destination | Description |
DMA | DMA_IRQ0 | SIMCOP_DMA_IRQ0 | SIMCOP IRQ merger | Interrupt triggered by SIMCOP DMA |
DMA | DMA_IRQ1 | SIMCOP_DMA_IRQ1 | SIMCOP IRQ merger | Interrupt triggered by SIMCOP DMA |
For more information about interrupt requests, see Interrupt Merger.