SPRUIE9D May 2017 – May 2024 DRA74P , DRA75P , DRA76P , DRA77P
Table 9-2585 is the SIMCOP register mapping summary. Table 9-2586 through Table 9-2606 describe the registers in detail.
Register Name | Type | Register Width (Bits) | Address Offset | L3_MAIN Physical Address |
---|---|---|---|---|
SIMCOP_HL_REVISION | R | 32 | 0x0000 0000 | 0x4222 0000 |
SIMCOP_HL_HWINFO | R | 32 | 0x0000 0004 | 0x4222 0004 |
SIMCOP_HL_SYSCONFIG | RW | 32 | 0x0000 0010 | 0x4222 0010 |
SIMCOP_HL_IRQ_EOI | RW | 32 | 0x0000 001C | 0x4222 001C |
SIMCOP_HL_IRQSTATUS_RAW_i | RW | 32 | 0x0000 0020 + (0x10 * I) | 0x4222 0020 + (0x10 * I) |
SIMCOP_HL_IRQSTATUS_i (1) | RW | 32 | 0x0000 0024 + (0x10 * I) | 0x4222 0024 + (0x10 * I) |
SIMCOP_HL_IRQENABLE_SET_i (1) | RW | 32 | 0x0000 0028 + (0x10 * I) | 0x4222 0028 + (0x10 * I) |
SIMCOP_HL_IRQENABLE_CLR_i (1) | RW | 32 | 0x0000 002C + (0x10 * I) | 0x4222 002C + (0x10 * I) |
SIMCOP_CTRL | RW | 32 | 0x0000 0060 | 0x4222 0060 |
SIMCOP_CLKCTRL | RW | 32 | 0x0000 0064 | 0x4222 0064 |
SIMCOP_CTRL2 | RW | 32 | 0x0000 00FC | 0x4222 00FC |