The CPU identification register (CPUID) contains the major and minor version ID. The CPUID is shown in Figure 8-50 and described in Table 8-332.
Figure 8-50 CPU Identification Register (CPUID) LEGEND: R = Readable by the MVC instruction; W = Writeable by the MVC instruction; -n = value after reset; -x = value is indeterminate after reset |
Table 8-332 CPU Identification Register (CPUID) Field DescriptionsBit | Field | Value | Description |
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31-20 | Reserved | 0 | Reserved. The reserved bit location is always read as 0. A value written to this field has no effect. |
19-16 | CPUNUM | 0-Fh | Reflects the value on the t_cpunum_i[3:0] input port. The input port is sampled on reset release and kept constant – it is not sampled continuously. |
15-12 | Y_MINOR | 0-Fh | Minor revision. |
11-0 | X_MAJOR | 0-FFFh | Major revision. |