SPRUIE9D May 2017 – May 2024 DRA74P , DRA75P , DRA76P , DRA77P
Table 9-2687 through Table 9-2733 describe the registers in details.
Address Offset | 0x0000 0000 | ||
Physical Address | 0x4222 0A00 | Instance | VTNF |
Description | IP Revision Identifier (X.Y.R) Used by software to track features, bugs, and compatibility | ||
Type | R |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
REVISION |
Bits | Field Name | Description | Type | Reset |
---|---|---|---|---|
31:0 | REVISION | IP Revision | R | See (1) |
ISS VTNF Module |
Address Offset | 0x0000 0004 | ||
Physical Address | 0x4222 0A04 | Instance | VTNF |
Description | Control | ||
Type | RW |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | BUSY | RESERVED | AUTOGATING | TRIG_SRC | INTEN | RESERVED | EN |
Bits | Field Name | Description | Type | Reset |
---|---|---|---|---|
31:17 | RESERVED | R | 0x0 | |
16 | BUSY | Idle/busy status (read-only) 0 = idle 1 = busy | R | 0x0 |
15:11 | RESERVED | R | 0x0 | |
10 | AUTOGATING | Internal clock gating on OCP clock and functional clock 0 = clocks are free-running 1 = clocks are gated off in subblocks that are not needed for operation | RW | 0x1 |
9 | TRIG_SRC | Starting mechanism trigger source 0 = software writing 1 to EN 1 = HW sequencer sending pulse on START signal | RW | 0x0 |
8 | INTEN | Interrupt enable. 0 = disable, 1 = enable. | RW | 0x0 |
7:1 | RESERVED | R | 0x0 | |
0 | EN | Write 1 when TRIG_SRC=0 to start module operation. Read back 0 always | W | 0x0 |
ISS VTNF Module |
Address Offset | 0x0000 0008 | ||
Physical Address | 0x4222 0A08 | Instance | VTNF |
Description | |||
Type | RW |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | T | RESERVED | FMT |
Bits | Field Name | Description | Type | Reset |
---|---|---|---|---|
31:8 | RESERVED | R | 0x0 | |
7:4 | T | Round-down number of bits for SAD calculation | RW | 0x0 |
3:1 | RESERVED | R | 0x0 | |
0 | FMT | Previous frame output and current frame output format. 0 = NV12 1 = YV12 | RW | 0x0 |
ISS VTNF Module |
Address Offset | 0x0000 000C | ||
Physical Address | 0x4222 0A0C | Instance | VTNF |
Description | Configuration | ||
Type | RW |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
BLKH | BLKW |
Bits | Field Name | Description | Type | Reset |
---|---|---|---|---|
31:16 | BLKH | Block height, valid range 4..128, multiple of 4. | RW | 0x0 |
15:0 | BLKW | Block width, valid range 32..512, multiple of 32. | RW | 0x0 |
ISS VTNF Module |
Address Offset | 0x0000 0010 | ||
Physical Address | 0x4222 0A10 | Instance | VTNF |
Description | Current frame input byte address | ||
Type | RW |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | ADDR | RESERVED |
Bits | Field Name | Description | Type | Reset |
---|---|---|---|---|
31:16 | RESERVED | R | 0x0 | |
15:4 | ADDR | Address in 128-bit words. Intention is that software write a byte address into the register. Hardware ignores the lowest 4 bits and bits 15..4 specifies the 128 -bit/word memory address. | RW | 0x0 |
3:0 | RESERVED | R | 0x0 |
ISS VTNF Module |
Address Offset | 0x0000 0014 | ||
Physical Address | 0x4222 0A14 | Instance | VTNF |
Description | Previous frame output byte address | ||
Type | RW |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | ADDR | RESERVED |
Bits | Field Name | Description | Type | Reset |
---|---|---|---|---|
31:16 | RESERVED | R | 0x0 | |
15:4 | ADDR | Address in 128-bit words. Intention is that software write a byte address into the register. Hardware ignores the lowest 4 bits and bits 15..4 specifies the 128 -bit/word memory address. | RW | 0x0 |
3:0 | RESERVED | R | 0x0 |
ISS VTNF Module |
Address Offset | 0x0000 0018 | ||
Physical Address | 0x4222 0A18 | Instance | VTNF |
Description | Current frame output byte address | ||
Type | RW |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | ADDR | RESERVED |
Bits | Field Name | Description | Type | Reset |
---|---|---|---|---|
31:16 | RESERVED | R | 0x0 | |
15:4 | ADDR | Address in 128-bit words. Intention is that software write a byte address into the register. Hardware ignores the lowest 4 bits and bits 15..4 specifies the 128 -bit/word memory address. | RW | 0x0 |
3:0 | RESERVED | R | 0x0 |
ISS VTNF Module |
Address Offset | 0x0000 001C | ||
Physical Address | 0x4222 0A1C | Instance | VTNF |
Description | Line offset for C, P, O arrays | ||
Type | RW |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | LOFST | RESERVED |
Bits | Field Name | Description | Type | Reset |
---|---|---|---|---|
31:16 | RESERVED | R | 0x0 | |
15:4 | LOFST | Line offset in 128-bit words. Intention is that software write a byte-count line offset into the register. Hardware ignores the lowest 4 bits and bits 15..4 specifies the 128 -bit/word line offset. | RW | 0x0 |
3:0 | RESERVED | R | 0x0 |
ISS VTNF Module |
Address Offset | 0x0000 0020 | ||
Physical Address | 0x4222 0A20 | Instance | VTNF |
Description | Weights for SAD calculation | ||
Type | RW |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | W2 | RESERVED | W1 |
Bits | Field Name | Description | Type | Reset |
---|---|---|---|---|
31:22 | RESERVED | R | 0x0 | |
21:16 | W2 | W2 parameter, chroma weight for SAD calculation. | RW | 0x0 |
15:6 | RESERVED | R | 0x0 | |
5:0 | W1 | W1 oarameter, luma weight for SAD calculation. | RW | 0x0 |
ISS VTNF Module |
Address Offset | 0x0000 0024 | ||
Physical Address | 0x4222 0A24 | Instance | VTNF |
Description | Lookup table 1 | ||
Type | RW |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
LUT1_3 | LUT1_2 | LUT1_1 | LUT1_0 |
Bits | Field Name | Description | Type | Reset |
---|---|---|---|---|
31:24 | LUT1_3 | LUT1[3] | RW | 0x0 |
23:16 | LUT1_2 | LUT1[2] | RW | 0x0 |
15:8 | LUT1_1 | LUT1[1] | RW | 0x0 |
7:0 | LUT1_0 | LUT1[0] | RW | 0x0 |
ISS VTNF Module |
Address Offset | 0x0000 0028 | ||
Physical Address | 0x4222 0A28 | Instance | VTNF |
Description | Lookup table 1 | ||
Type | RW |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
LUT1_7 | LUT1_6 | LUT1_5 | LUT1_4 |
Bits | Field Name | Description | Type | Reset |
---|---|---|---|---|
31:24 | LUT1_7 | LUT1[7] | RW | 0x0 |
23:16 | LUT1_6 | LUT1[6] | RW | 0x0 |
15:8 | LUT1_5 | LUT1[5] | RW | 0x0 |
7:0 | LUT1_4 | LUT1[4] | RW | 0x0 |
ISS VTNF Module |
Address Offset | 0x0000 002C | ||
Physical Address | 0x4222 0A2C | Instance | VTNF |
Description | Lookup table 1 | ||
Type | RW |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
LUT1_11 | LUT1_10 | LUT1_9 | LUT1_8 |
Bits | Field Name | Description | Type | Reset |
---|---|---|---|---|
31:24 | LUT1_11 | LUT1[11] | RW | 0x0 |
23:16 | LUT1_10 | LUT1[10] | RW | 0x0 |
15:8 | LUT1_9 | LUT1[9] | RW | 0x0 |
7:0 | LUT1_8 | LUT1[8] | RW | 0x0 |
ISS VTNF Module |
Address Offset | 0x0000 0030 | ||
Physical Address | 0x4222 0A30 | Instance | VTNF |
Description | Lookup table 1 | ||
Type | RW |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
LUT1_15 | LUT1_14 | LUT1_13 | LUT1_12 |
Bits | Field Name | Description | Type | Reset |
---|---|---|---|---|
31:24 | LUT1_15 | LUT1[15] | RW | 0x0 |
23:16 | LUT1_14 | LUT1[14] | RW | 0x0 |
15:8 | LUT1_13 | LUT1[13] | RW | 0x0 |
7:0 | LUT1_12 | LUT1[12] | RW | 0x0 |
ISS VTNF Module |
Address Offset | 0x0000 0034 | ||
Physical Address | 0x4222 0A34 | Instance | VTNF |
Description | Lookup table 1 | ||
Type | RW |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
LUT1_19 | LUT1_18 | LUT1_17 | LUT1_16 |
Bits | Field Name | Description | Type | Reset |
---|---|---|---|---|
31:24 | LUT1_19 | LUT1[19] | RW | 0x0 |
23:16 | LUT1_18 | LUT1[18] | RW | 0x0 |
15:8 | LUT1_17 | LUT1[17] | RW | 0x0 |
7:0 | LUT1_16 | LUT1[16] | RW | 0x0 |
ISS VTNF Module |
Address Offset | 0x0000 0038 | ||
Physical Address | 0x4222 0A38 | Instance | VTNF |
Description | Lookup table 1 | ||
Type | RW |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
LUT1_23 | LUT1_22 | LUT1_21 | LUT1_20 |
Bits | Field Name | Description | Type | Reset |
---|---|---|---|---|
31:24 | LUT1_23 | LUT1[23] | RW | 0x0 |
23:16 | LUT1_22 | LUT1[22] | RW | 0x0 |
15:8 | LUT1_21 | LUT1[21] | RW | 0x0 |
7:0 | LUT1_20 | LUT1[20] | RW | 0x0 |
ISS VTNF Module |
Address Offset | 0x0000 003C | ||
Physical Address | 0x4222 0A3C | Instance | VTNF |
Description | Lookup table 1 | ||
Type | RW |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
LUT1_27 | LUT1_26 | LUT1_25 | LUT1_24 |
Bits | Field Name | Description | Type | Reset |
---|---|---|---|---|
31:24 | LUT1_27 | LUT1[27] | RW | 0x0 |
23:16 | LUT1_26 | LUT1[26] | RW | 0x0 |
15:8 | LUT1_25 | LUT1[25] | RW | 0x0 |
7:0 | LUT1_24 | LUT1[24] | RW | 0x0 |
ISS VTNF Module |
Address Offset | 0x0000 0040 | ||
Physical Address | 0x4222 0A40 | Instance | VTNF |
Description | Lookup table 1 | ||
Type | RW |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
LUT1_31 | LUT1_30 | LUT1_29 | LUT1_28 |
Bits | Field Name | Description | Type | Reset |
---|---|---|---|---|
31:24 | LUT1_31 | LUT1[31] | RW | 0x0 |
23:16 | LUT1_30 | LUT1[30] | RW | 0x0 |
15:8 | LUT1_29 | LUT1[29] | RW | 0x0 |
7:0 | LUT1_28 | LUT1[28] | RW | 0x0 |
ISS VTNF Module |
Address Offset | 0x0000 0044 | ||
Physical Address | 0x4222 0A44 | Instance | VTNF |
Description | Lookup table 1 | ||
Type | RW |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
LUT2_3 | LUT2_2 | LUT2_1 | LUT2_0 |
Bits | Field Name | Description | Type | Reset |
---|---|---|---|---|
31:24 | LUT2_3 | LUT2[3] | RW | 0x0 |
23:16 | LUT2_2 | LUT2[2] | RW | 0x0 |
15:8 | LUT2_1 | LUT2[1] | RW | 0x0 |
7:0 | LUT2_0 | LUT2[0] | RW | 0x0 |
ISS VTNF Module |
Address Offset | 0x0000 0048 | ||
Physical Address | 0x4222 0A48 | Instance | VTNF |
Description | Lookup table 1 | ||
Type | RW |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
LUT2_7 | LUT2_6 | LUT2_5 | LUT2_4 |
Bits | Field Name | Description | Type | Reset |
---|---|---|---|---|
31:24 | LUT2_7 | LUT2[7] | RW | 0x0 |
23:16 | LUT2_6 | LUT2[6] | RW | 0x0 |
15:8 | LUT2_5 | LUT2[5] | RW | 0x0 |
7:0 | LUT2_4 | LUT2[4] | RW | 0x0 |
ISS VTNF Module |
Address Offset | 0x0000 004C | ||
Physical Address | 0x4222 0A4C | Instance | VTNF |
Description | Lookup table 1 | ||
Type | RW |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
LUT2_11 | LUT2_10 | LUT2_9 | LUT2_8 |
Bits | Field Name | Description | Type | Reset |
---|---|---|---|---|
31:24 | LUT2_11 | LUT2[11] | RW | 0x0 |
23:16 | LUT2_10 | LUT2[10] | RW | 0x0 |
15:8 | LUT2_9 | LUT2[9] | RW | 0x0 |
7:0 | LUT2_8 | LUT2[8] | RW | 0x0 |
ISS VTNF Module |
Address Offset | 0x0000 0050 | ||
Physical Address | 0x4222 0A50 | Instance | VTNF |
Description | Lookup table 1 | ||
Type | RW |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
LUT2_15 | LUT2_14 | LUT2_13 | LUT2_12 |
Bits | Field Name | Description | Type | Reset |
---|---|---|---|---|
31:24 | LUT2_15 | LUT2[15] | RW | 0x0 |
23:16 | LUT2_14 | LUT2[14] | RW | 0x0 |
15:8 | LUT2_13 | LUT2[13] | RW | 0x0 |
7:0 | LUT2_12 | LUT2[12] | RW | 0x0 |
ISS VTNF Module |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
LUT2_19 | LUT2_18 | LUT2_17 | LUT2_16 |
Bits | Field Name | Description | Type | Reset |
---|---|---|---|---|
31:24 | LUT2_19 | LUT2[19] | RW | 0x0 |
23:16 | LUT2_18 | LUT2[18] | RW | 0x0 |
15:8 | LUT2_17 | LUT2[17] | RW | 0x0 |
7:0 | LUT2_16 | LUT2[16] | RW | 0x0 |
Address Offset | 0x0000 0058 | ||
Physical Address | 0x4222 0A58 | Instance | VTNF |
Description | Lookup table 1 | ||
Type | RW |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
LUT2_23 | LUT2_22 | LUT2_21 | LUT2_20 |
Bits | Field Name | Description | Type | Reset |
---|---|---|---|---|
31:24 | LUT2_23 | LUT2[23] | RW | 0x0 |
23:16 | LUT2_22 | LUT2[22] | RW | 0x0 |
15:8 | LUT2_21 | LUT2[21] | RW | 0x0 |
7:0 | LUT2_20 | LUT2[20] | RW | 0x0 |
ISS VTNF Module |
Address Offset | 0x0000 005C | ||
Physical Address | 0x4222 0A5C | Instance | VTNF |
Description | Lookup table 1 | ||
Type | RW |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
LUT2_27 | LUT2_26 | LUT2_25 | LUT2_24 |
Bits | Field Name | Description | Type | Reset |
---|---|---|---|---|
31:24 | LUT2_27 | LUT2[27] | RW | 0x0 |
23:16 | LUT2_26 | LUT2[26] | RW | 0x0 |
15:8 | LUT2_25 | LUT2[25] | RW | 0x0 |
7:0 | LUT2_24 | LUT2[24] | RW | 0x0 |
ISS VTNF Module |
Address Offset | 0x0000 0060 | ||
Physical Address | 0x4222 0A60 | Instance | VTNF |
Description | Lookup table 1 | ||
Type | RW |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
LUT2_31 | LUT2_30 | LUT2_29 | LUT2_28 |
Bits | Field Name | Description | Type | Reset |
---|---|---|---|---|
31:24 | LUT2_31 | LUT2[31] | RW | 0x0 |
23:16 | LUT2_30 | LUT2[30] | RW | 0x0 |
15:8 | LUT2_29 | LUT2[29] | RW | 0x0 |
7:0 | LUT2_28 | LUT2[28] | RW | 0x0 |