The following messages can appear when the compiler or assembly optimizer is processing a software pipeline and it fails:
Address increment is too large. An address register's offset must be adjusted because the offset is out of range of the offset addressing mode. You must minimize address register offsets.
Cannot allocate machine registers. A software pipeline schedule was found, but it cannot allocate machine registers for the schedule. Simplification of the loop may help.
The register usage for the schedule found at the given ii is displayed.
Regs Live Always. The number of values that must be assigned a register for the duration of the whole loop body. This means that these values must always be allocated registers for any given schedule found for the loop.
Max Regs Live. Maximum number of values live at any given cycle in the loop that must be allocated to a register. This indicates the maximum number of registers required by the schedule found.
Max Cond Regs Live. Maximum number of registers live at any given cycle in the loop kernel that must be allocated to a condition register.
Cycle count too high. Never profitable. With the schedule that the compiler found for the loop, it is more efficient to use a non-software-pipelined version.
Did not find schedule. The compiler was unable to find a schedule for the software pipeline at the given ii (iteration interval). You should simplify the loop and/or eliminate loop carried dependencies.
Iterations in parallel > minimum or maximum
iteration count. A software pipeline schedule was found, but the
schedule has more iterations in parallel than the minimum or maximum loop
iteration count. You must enable redundant loops or communicate the iteration
information.
Register is live too long. A register must have a value that exists (is live) for more than ii cycles. The compiler tries to insert move instructions to split register lifetimes that are longer than ii cycles , but may not always be successful.
Too many predicates live on one side. The
C7000 has predicate, or conditional,
registers available for use with conditional instructions. There are six predicate registers. There are three on the A side and three on
the B side. Sometimes the particular partition and schedule combination requires
more than these available registers.
Schedule found with N iterations in parallel. (This is not a failure message.) A software pipeline schedule was found with N iterations executing in parallel.
Iteration variable used in loop - Cannot
adjust iteration count. The loop iteration counter has a use in the loop
other than as a loop iteration counter.
Unsafe schedule for irregular loop. "Irregular" loops are non-downcounting loops with a known number of iterations, such as a while loop. Irregular loops may require transformations that execute instructions more times than called for by the loop. This error means the compiler was unable to find a schedule with instructions that are safe to over-execute, are guarded with a predicate, or have their effects undone after the loop. Try to rewrite the loop as a down-counting loop.