SPRUII0 User guide

SPRUII0F May 2019 – June 2024 TMS320F28384D , TMS320F28384D-Q1 , TMS320F28384S , TMS320F28384S-Q1 , TMS320F28386D , TMS320F28386D-Q1 , TMS320F28386S , TMS320F28386S-Q1 , TMS320F28388D , TMS320F28388S

12.2.6.4.1 Asynchronous Read Operations (Normal Mode)

Note: During an entire asynchronous read operation, the EM1WE pin is driven high.

An asynchronous read is performed when any of the requesters mentioned in Section 12.2.2 request a read from the attached asynchronous memory. After the request is received, a read operation is initiated once the request becomes the EMIF's highest priority task, according to the priority scheme detailed in Section 12.2.13. In the event that the read request cannot be serviced by a single access cycle to the external device, multiple access cycles are performed by EMIF until the entire request is fulfilled. The details of an asynchronous read operation in normal mode are described in Table 12-21. Also, Figure 12-11 shows an example timing diagram of a basic read operation.

Table 12-21 Asynchronous Read Operation in Normal Mode

Time Interval	Pin Activity in Normal Mode
Turnaround period	Once the read operation becomes the highest priority task for EMIF, the EMIF waits for the programmed number of turn-around cycles before proceeding to the setup period of the operation. The number of wait cycles is taken directly from the TA field of the asynchronous n configuration register (ASYNC_CSn_CR). Between each access (write or read), the EMIF inserts two cycles of delay even though TA field is programmed as 0. After the EMIF has waited for the turnaround cycles to complete, the EMIF again checks to make sure that the read operation is still the highest priority task. If so, the EMIF proceeds to the setup period of the operation. If the read operation is no longer the highest priority task, the EMIF terminates the operation.
Start of the setup period	The following actions occur at the start of the setup period: The setup, strobe, and hold values are set according to the R_SETUP, R_STROBE, and R_HOLD values in ASYNC_CSn_CR. The address pins EM1A and EM1BA become valid and carry the values described in Section 12.2.6.1. EM1CS[4:2] falls to enable the external device (if not already low from a previous operation)
Strobe period	The following actions occur during the strobe period of a read operation: EM1OE falls at the start of the strobe period On the rising edge of the clock that is concurrent with the end of the strobe period: EM1OE rises The data on the EM1Dx bus is sampled by EMIF. In Figure 12-11, EM1WAIT is inactive. If EM1WAIT is instead activated, the strobe period can be extended by the external device to give it more time to provide the data. Section 12.2.6.6 contains more details on using the EM1WAIT pin.
End of the hold period	At the end of the hold period: The address pins EM1A and EM1BA become invalid EM1CS[4:2] rises (if no more operations are required to complete the current request) The EMIF can be required to issue additional read operations to a device with a small data bus width to complete an entire word access. In this case, the EMIF immediately re-enters the setup period to begin another operation without incurring the turn-round cycle delay. The setup, strobe, and hold values are not updated in this case. If the entire word access has been completed, the EMIF returns to the previous state unless another asynchronous request has been submitted and is currently the highest priority task. If this is the case, EMIF instead enters directly into the turnaround period for the pending read or write operation.

F2838x Timing Waveform of an Asynchronous Read Cycle in Normal Mode

Figure 12-11 Timing Waveform of an Asynchronous Read Cycle in Normal Mode