SPRUII7B June   2018  – April 2020 TMS320F280040-Q1 , TMS320F280040C-Q1 , TMS320F280041 , TMS320F280041-Q1 , TMS320F280041C , TMS320F280041C-Q1 , TMS320F280045 , TMS320F280048-Q1 , TMS320F280048C-Q1 , TMS320F280049 , TMS320F280049-Q1 , TMS320F280049C , TMS320F280049C-Q1

 

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2.3.3.1 EQEP1

GPIO35, GPIO37, and GPIO59 are routed to J12 through U9. By setting position 2 (LEFT) of S3 to 0 (DOWN), the eQEP signals are routed to J12. GPIO35 and GPIO37 also require that S4 is set to 1 (UP). In addition to configuring the switches, ensure that the EQEP1 function is selected in the GPIO Mux.