During Flash configuration, no
accesses to the Flash or OTP
can be in progress. This includes instructions still in the CPU pipeline, data
reads, and instruction prefetch operations. To be sure that no access takes place
during the configuration change, follow the procedure shown below for any code that
modifies the Flash control registers.
- Start executing application code
from RAM/Flash/OTP.
- Branch to or call the Flash
configuration code (that writes to Flash control registers) in RAM. This is
required to properly flush the CPU pipeline before the configuration change. The
function that changes the Flash configuration cannot execute from the Flash or OTP and must reside in
RAM.
- Execute the Flash configuration
code (located in RAM) that writes to Flash control registers like FRDCNTL,
FRD_INTF_CTRL, and so on.
- At the end of the Flash
configuration code execution, wait eight cycles to let the write instructions
propagate through the CPU pipeline. This must be done before the
return-from-function call is made.
- Return to the calling function
that resides in RAM or Flash/OTP and continue execution.