SPRUIR8B april   2020  – july 2023

 

  1.   1
  2.   CLB Tool
  3.   Trademarks
  4. 1Introduction
    1. 1.1 CLB Tool Outline
    2. 1.2 Overview of the CLB Configuration Process
  5. 2Getting Started
    1. 2.1 CLB Related Collateral
    2. 2.2 Introduction
    3. 2.3 Installation
      1. 2.3.1 Installation to Compile SystemC
      2. 2.3.2 Install the Simulation Viewer
  6. 3Using the CLB Tool
    1. 3.1 Import the Empty CLB Project
    2. 3.2 Updating Variable Paths
    3. 3.3 Configuring a CLB Tile
    4. 3.4 Creating the CLB Diagram
    5. 3.5 Using the Simulator
      1. 3.5.1 The Statics Panel
      2. 3.5.2 Creating the Input Stimulus
      3. 3.5.3 Running the Simulation
      4. 3.5.4 Trace Signal Descriptions
  7. 4Examples
    1. 4.1 Foundational Examples
      1. 4.1.1  CLB Empty Project
      2. 4.1.2  Example 3 – PWM Generation
      3. 4.1.3  Example 7 – State Machine
      4. 4.1.4  Example 13 – PUSH-PULL Interface
      5. 4.1.5  Example 14 – Multi-Tile
      6. 4.1.6  Example 15 – Tile to Tile Delay
      7. 4.1.7  Example 16 - Glue Logic
      8. 4.1.8  Exampe 18 - AOC
      9. 4.1.9  Example 19 - AOC Release Control
      10. 4.1.10 Example 20 - CLB XBARs
    2. 4.2 Getting Started Examples
      1. 4.2.1  Example 1 – Combinatorial Logic
      2. 4.2.2  Example 2 – GPIO Input Filter
      3. 4.2.3  Example 4 – PWM Protection
      4. 4.2.4  Example 5 – Event Window
      5. 4.2.5  Example 6 – Signal Generation and Check
      6. 4.2.6  Example 8 – External AND Gate
      7. 4.2.7  Example 9 – Timer
      8. 4.2.8  Example 10 – Timer With Two States
      9. 4.2.9  Example 11 – Interrupt Tag
      10. 4.2.10 Example 12 – Output Intersect
      11. 4.2.11 Example 17 – One-Shot PWM Generation
      12. 4.2.12 Example 21 - Clock Prescaler and NMI
      13. 4.2.13 Example 22 - Serializer
      14. 4.2.14 Example 23 - LFSR
      15. 4.2.15 Example 24 - Lock Output Mask
      16. 4.2.16 Example 25 - Input Pipeline Mode
      17. 4.2.17 Example 26 - Clocking Pipeline Mode
    3. 4.3 Expert Examples
      1. 4.3.1 Example 27 - SPI Data Export
      2. 4.3.2 Example 28 - SPI Data Export DMA
      3. 4.3.3 Example 29 - Timestamp
      4. 4.3.4 Example 30 - Cyclic Redundancy Check
      5. 4.3.5 CLB TDM Serial Port
      6. 4.3.6 CLB LED Driver
      7. 4.3.7 FPGA/CPLD to C2000 Examples
  8. 5Enabling CLB Tool in Existing DriverLib Projects
  9. 6Frequently Asked Questions (FAQs)
  10. 7Revision History

5 Enabling CLB Tool in Existing DriverLib Projects

Use the following steps to add CLB support to an existing C2000WARE DriverLib Project:

  1. Add the "empty.syscfg" file (for F2837xD <C2000WARE_INSTALL>\driverlib\f2837xd\examples\cpu1\clb\empty.syscfg) from the CLB examples folder to the project by copying the file into the project directory.
  2. CCS asks the user whether or not to enable SysConfig. Accept and select "Yes".
    GUID-CE952D36-69B5-42E1-BF48-B022E9FB6A7A-low.png Figure 5-1 Enable SysConfig
  3. Open the "Project Properties" and open the Resources → Linked Resources. Add the following Variable Paths:
    1. C2000WARE_ROOT
      [PATH_TO_C2000WARE]
    2. CLB_SYSCFG_ROOT [PATH_TO_CLB_TOOL]
      1. See step 6 for more details
  4. In the Project Properties window, select Build → Steps.
  5. Add the following line to the Post-build steps as seen in Figure 5-2.
    1. ${NODE_TOOL} "${C2000WARE_ROOT}/dot_file_libraries/clbDotUtility.js" "${C2000WARE_ROOT}" "${BuildDirectory}/syscfg" "${BuildDirectory}/syscfg/clb.dot"
    GUID-309D663B-5810-40DA-9433-9A020E26CA48-low.png Figure 5-2 Post-Build Steps
  6. Next, open Resources → Linked Resources to verify the correct path for CLB_SYSCFG_ROOT is used. Then open Build → SysConfig → Basic Options and add the proper path to the Root system config meta data list; do this only in the case where the project does not contain SysConfig:
    1. Make sure that the Linked Resources has the correct path for CLB_SYSCFG_ROOT
      GUID-04A48CE5-5588-4033-9CEF-A2EAC82EC784-low.png Figure 5-3 Linked Resources for Enabling CLB Tool
    2. ${CLB_SYSCFG_ROOT}/.metadata/product.json
      GUID-51825E2A-04F1-40B1-96B5-C25C2DD85436-low.png Figure 5-4 SysConfig SDK Path
  7. Finally click Apply and Close.
  8. After building the project, the content generated by the CLB Tool will be present in the build configuration directory. Figure 5-5 shows an example of this after adding CLB support to the epwm_ex1_trip_zone driverlib example.
    GUID-A789C6E8-A312-497A-9A37-28BBBEEB9C80-low.gif Figure 5-5 epwm_ex1_trip_zone With CLB Tool Support