To accomplish the SDR write transfer, the host must perform the following steps:
- Write all payload data bytes into TX FIFO buffer:
- Write first four or less bytes to be sent, with first byte stored at LSB position.
- Repeat writes until whole payload is written.
- Write Private Write command to command queue:
- Write the Command Word 1 (I3C_CMD1_FIFO) with
slave CSR address:
- CSR (bits
[15:0] or [7:0]): Slave register address
- Write the Command Word0 (I3C_CMD0_FIFO) with
following data fields:
- I3C_CMD0_FIFO[31] IS_DDR: 0x0
- I3C_CMD0_FIFO[30] IS_CCC: 0x0
- I3C_CMD0_FIFO[28-27] XMIT_MODE: Transmit Mode
- I3C_CMD0_FIFO[26] SBCA: 0x1 for 16-bit CSR address, 0x0
otherwise
- I3C_CMD0_FIFO[23-12] PL_LEN: Number of bytes to send
- I3C_CMD0_FIFO[7-1] DEV_ADDR: Slave Address
- I3C_CMD0_FIFO[0] RNW: 0x0
- Wait for transfer completion notified by
I3C_MST_ISR[16] IMM_COMP bit, which indicates that all data of particular
command are successfully transmitted to the slave.